Changhong Electric PT4206, Руководство по обслуживанию, Страница: 18 / 48

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TA2024 Block Diagram
2.2.
6
DS90CF383A General
The DS90C383A/DS90CF383A transmitter converts 28 bits of CMOS/TTL data into four
LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is
transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit
clock 28 bits of input data are sampled and transmitted. At a transmit clock frequency of 65
MHz, 24 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME,
DRDY) are transmitted at a rate of 455 Mbps per LVDS data channel. Using a 65 MHz clock,
the data throughput is 227 Mbytes/
sec. The DS90C383A transmitter can be programmed for Rising edge strobe or Falling edge
strobe through a dedicated pin. The DS90CF383A is fixed as a Falling edge strobe transmitter.
Pin
Function Descriptions
Pin(s) Name Function
1,9,17,26,34
44 VCC Power supply
5,13,21,29,53
33,35,36,43,49 GND Ground
2,3,50,51,52
54,55,56
DRE0 DRE7 8bit red data input
4,6,7,11,12,14
8,10
DGE0 DGE7 8bit green data input
15,19,20,22
23,24,8,16
DBE0 DBE7 8bit blue data input