BVM BVME4000, Руководство пользователя

Страница: 65 / 87

55 BVME4000/6000
Copyright

1993,1995,1998,2001 BVM Ltd.
7.13.5 Handshake Pin Usage
H1: This must be configured as an input. It is connected to /PACKNOW signal via an inverting
buffer.
H2: This must be configured as an output. It is connected to /PSTROBE signal via an inverting
buffer.
H3: This must be configured as an input. It is connected to PBUSY signal via an inverting buffer.
H4: This signal is currently not connected on the BVME4000/6000.
7.13.6 MC68230 PI/T Registers
The register map of the MC68230 is shown below. The register map consists of a bank of 32 byte
wide registers (of which some are undefined). The registers are mapped on the least significant byte
of long words.
Address Register Access Affected by
Reset
Affected by
Access
FFA00003 Port General Control Register R/W Yes No
FFA00007 Port Service Request Register R/W Yes No
FFA0000B Port A Data Direction Register R/W Yes No
FFA0000F Port B Data Direction Register R/W Yes No
FFA00013 Port C Data Direction Register R/W Yes No
FFA00017 Port Interrupt Vector Register R/W Yes No
FFA0001B Port A Control Register R/W Yes No
FFA0001F Port B Control Register R/W Yes No
FFA00023 Port A Data Register R/W No Yes
FFA00027 Port B Data Register R/W No Yes
FFA0002B Port A Alternate Register R No No
FFA0002F Port B Alternate Register R No No
FFA00033 Port C Data Register R/W No No
FFA00037 Port Status Register R/W Yes No
FFA0003B Reserved
FFA0003F Reserved
FFA00043 Timer Control Register R/W Yes No
FFA00047 Timer Interrupt Vector Register R/W Yes No
FFA0004B Reserved
FFA0004F Counter Preload Register High R/W No No
FFA00053 Counter Preload Register Middle R/W No No
FFA00057 Counter Preload Register Low R/W No No
FFA0005B Reserved
FFA0005F Counter Register High R No No
FFA00063 Counter Register Middle R No No
FFA00067 Counter Register Low R No No
FFA0006B Timer Status Register R/W Yes No
FFA0006F Reserved