BUFFALO FTD-G931AS/BK
21
8.Schematic
8.1 Main Board
VCC12V
B4
2.POWER
onPanel_5V/3.3V
onBACKLITE
AdjBACKLITE
VCC3.3
VCC1.8
VAA1
VAA2
VAA3
VAA4
VCC5V
VCC12V
VLCD
VCPU
VAA2
VAA4
VAA1
VCC1.8
VCC3.3
TOP
B
TSU16/56AK
B
1
6
Wednesday, October 06, 2004
Title
Size
Document Number
Rev
Date:
Sheet
of
VCC1.8
PA[0..9]
VAA2
VCC12V
VCPU
VLCD
VLCD
VCC5V
PB[0..9]
VCC3.3
B3
6.MCU
onBACKLITE
onPANEL_5V/3.3V
SDA
INT
CSZ
DDC_DAT
ST_DET1
SCL
HWRESET
DDC_CLK
Volume
VCC5V
VCC12V
VCPU
RXD
TXD
AD0
AD1
AD2
AD3
DDC_WP
DVI_DET
DDCCI_SEL
VAA3
VCPU
VAA4
VAA3
TSU16/56AK SCHEMATIC
B1
3.INPUT
RIN
GIN
BIN
VSYNC
GNDR
GNDG
GNDB
ST_DET1
HSYNC
SOG
DDC_CLK
DDC_DAT
R+
R-
G-
G+
B+
B-
CLK+
CLK-
TXD
RXD
DDC_WP
DVI_DET
DDCCI_SEL
B5
5.PANEL INTERFACE
VLCD
PB[0..9]
PA[0..9]
VCC5V
B2
4.SCALER
RIN
GIN
SOG
BIN
GNDR
GNDG
GNDB
HSYNC
VSYNC
R+
R-
G-
G+
B+
B-
CLK+
CLK-
CSZ
SCL
SDA
HWRESET
INT
Volume
AdjBACKLITE
PA[0..9]
PB[0..9]
VCC1.8
VCC3.3
VAA1
VAA2
VAA3
VAA4
AD0
AD1
AD2
AD3
VAA1