Bouffalo Lab BL602, Справочное руководство

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BL602/604 Reference Manual
Table 1.1: Bus connection
Slave/Master
CPU SDIO DMA encryption
engine
Debug
interface
memory V V V V V
Peripheral V V V - V
WiFi/BLE V V V - V
The address access mainly distinguishes ”memory” or ”peripheral” by [27:24], and the [31:28] bits can be ignored. The
memory space is consecutive addresses 0x2008000 ~ 0x204BFFF (272KB SRAM), the read-only memory address is
0x1000000, and the deep sleep memory address is 0x0010000. The off-chip space address is 0x3000000 (maximum
support 16MB Flash). The peripheral space is 0x0000000 ~ 0x000F000.
Table 1.2: Address mapping
Name
Address Size Description
WRAM 0x42030000 112KB Wireless SRAM memory
RETRAM 0x40010000 4KB Deep sleep memory (RAM reserved)
HBN 0x4000F000 4KB Deep Sleep Control (Hibernation)
PDS 0x4000E000 4KB Sleep control (power-down sleep)
SDU 0x4000D000 4KB SDIO control
DMA 0x4000C000 4KB DMA control
QSPI 0x4000B000 4KB Flash control
IRR 0x4000A600 256B Infrared remote control
TIMER 0x4000A500 256B Timer control
PWM 0x4000A400 256B Pulse width modulation control
I2C 0x4000A300 256B I2C control
SPI 0x4000A200 256B SPI master / slave control
UART1 0x4000A100 256B UART control
UART0 0x4000A000 256B UART control
L1C 0x40009000 4KB Cache control
eFuse 0x40007000 4KB eFuse memory control
TZ2 0x40006000 4KB Trust zone isolation
TZ1 0x40005000 4KB Trust zone isolation
SEC 0x40004000 4KB Security engine
GPIP 0x40002000 4KB Universal DAC/ADC/ACOMP interface control
BL602/604 Reference Manual 17/ 195 @2020 Bouffalo Lab