Designing Hardware for QuickUSB
SPI
The QuickUSB module implements a ‘soft’ SPI port using pins on port E and
optionally port A. These routines support from 1 to 10 devices with individual
slave select lines for each device. The slave select lines are active low and are
shown in
Table 7 - QuickUSB Pin Definitions
. The signals are MOSI, SCK, MISO
and nSS0-9. By default, data is shifted in and out MSbit to LSbit. The bit shift
order can be configured by changing Bit 0 of the
setting.
The SPI bus runs at approximately 500Kbps.
SCLK
PE1
Name
Pin
Read Cycle
nSS[9:0]
PE[7:6], PA[7:0]
MOSI
PE0
MISO
PE5
X
X
D[N].7
X
X
D[N].6
D[0].2
D[0].1
D[0].0
D[N].5
D[N].4
D[N].3
D[N].2
D[N].1
Signifies QuickUSB Read from MISO
SCLK
PE1
Name
Pin
Write Cycle
nSS[9:0]
PA[7:0], PE[7:6]
MOSI
PE0
MISO
PE5
X
X
D[N].7
X
X
Signifies QuickUSB Write to MOSI
D[N].6
D[0].2
D[0].1
D[0].0
D[N].5
D[N].4
D[N].3
D[N].2
D[N].1
…
SCLK
PE1
Name
Pin
Write-Read Cycle
nSS[9:0]
PA[7:0], PE[7:6]
MOSI
PE0
MISO
PE5
Dout[N].7
X
X
Signifies QuickUSB Read from MISO
Dout[N].6
Dout[0].2
Dout[0].1
Dout[0].0
Dout[N].5
Dout[N].4
Dout[N].3
Dout[N].2
Dout[N].1
Din[N].7
X
X
Din[N].6
Din[0].2
Din[0].1
Din[0].0
Din[N].5
Din[N].4
Din[N].3
Din[N].2
Din[N].1
Signifies QuickUSB Write to MOSI
…
…
Figure 6 - SPI Timing Diagrams
If using any of the slave select signals on Port A (nSS2-9), Port A will convert to
the alternate slave select functionality for the entire port. Please ensure you do
not use Port A for General Purpose I/O if using the slave select 2-9 (nSS2-9)
signals.
If using any of the slave select signals on Port E (nSS0-1) PE6 and PE7 will
convert to the alternate slave select functionality for the entire port. Please
ensure you do not use PE6 or PE7 for General Purpose I/O if using the nSS0-
nSS1 signals.
22
SPI