NEDSP900 Development Board
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effect on the weak pull up resistance of the NEDSP900. Again there is no logic inversion
with this circuit.
6.3
Algorithm ‘Hold’ (SF)
This is a special facility (SF) that may be useful where this module is incorporated in certain
intercom systems (half duplex). As it will be noted from earlier comments in the Noise
Reduction section of this document, the DSP algorithm takes a few milliseconds to act on the
audio dependent on the noise content. Where the audio content fed into the Module is a
‘clean’ audio signal, the Noise Reduction algorithm reduces its effectiveness. In certain intercom
configurations where there may be bursts of ‘clean’ audio this can lead to problems and small
periods of noisy audio may be heard while the algorithm starts to pick up on the noise content
again.
The Algorithm ‘Hold’ line is marked as S.F. on the module and when activated ‘holds’ the Noise
Reduction algorithm in its last state. When De-activated, the algorithm continues where it left
off and effectively reduces or removes periods whereby there may be some Noise content
allowed through.
The Algorithm Hold pin is not bought out as an ‘off-board’ function of PL3, but is available as the
MSB of the Audio 2 Gain switch SW1. So placing this switch in the ON position will ‘Hold’ the
algorithm on both audio channels.
Содержание NEDSP900
Страница 17: ...NEDSP900 Development Board 17 Schematic Diagram Sheet 1 of 5 Output Buffer and Line Driver...
Страница 18: ...NEDSP900 Development Board 18 Schematic Diagram Sheet 2 of 5 NEDSP900 and Control Switches...
Страница 19: ...NEDSP900 Development Board 19 Schematic Diagram Sheet 3 of 5 Balanced Audio Inputs See also Appendix B...