Plexus 9000 Planning and Engineering Guide
DS1 I/O Front Module
Section 130-120-400
Issue 4, April 23, 2004
Telica, Inc.
5-117
5.9.3.4
Maintenance Link Bus Adapter (MLBA)
The Maintenance Link Bus Adapter (MLBA), which has a serialized
point-to-point interconnect between the SF module and each IOM,
controls the QFALC on each module. This link is used to reset an I/O
Module, detect the presence and CLEI code of the rear module, control the
LEDs located on the module, download images to the processor’s
memory, program the circuit switch registers and communicate
operational status from the IOM to the SP.
5.9.3.5
Microprocessor and Memory
Each module has a microprocessor with 32 Mbytes of SDRAM and 32
Mbytes of Flash memory for controlling the module. Each module also
has an EEPROM that contains the CLEI (BA9IAA0AAA) code for the
module.
5.9.3.6 Power
Each DS-1 I/O front module has its own DC-to-DC converter (not shown),
which converts the 48 volts supplied from the backplane to the local
voltages required (5V, 3V, etc.). The front modules supply power for the
rear modules.
5.9.3.7
Clocks and Synchronization
Clock and framing information is received from the BITS circuitry
because the maintenance link, ATM switch fabric and line interfaces all
operate synchronously to the BITS timing supplied to the chassis. The
clock control circuitry of the IOM distributes these on the module.
5.9.3.8
DS1 Protection Module
Slot 7 is the slot for the DS-1 protection module. A T1 protection bus
allows the front protection module to transmit/receive 28 T1 signal pairs
from any of the rear IOMs. This provides N:1 redundancy for electrical
interfaces. The rear DS-1 modules contain relays that pass the DS-1s
either to the front DS-1 module or to the protection bus. The rear
protection module obtains the DS-1 from the protection bus and passes it
to the front protection module.