Front Dual System Processor Timing Module 3
Plexus 9000 Planning and Engineering Guide
Issue 1, April 23, 2004
Section 130-120-220
5-54
Telica,
Inc.
The Dual SPs hold the internal Stratum 3 timing sources. Central office
BITS timing is brought into the rear of the Plexus 9000 via two
independent connections located on the rear SF modules. Recovered
timing from IOM-1 and 2 or IOM-8 and 10 can also be used. The TMG
section provides multiplexing control for routing each of the input clock
signals to the individual IOMs in the chassis. It also provides control
circuitry for selecting the master, supporting failover from the master to
the secondary, and generating alarms when failures on the input clock
lines occur.
The Plexus 9000 provides complete timing system redundancy for
protection against either BITS source, recovered line timing or internal
clock failure. Holdover is provided in the event of a complete loss of
external BITS timing.
The system processor section with memory provides the processing for the
Plexus 9000. It includes a FAM for processing all system events, an
EQM, which keeps track of state information, a TL1 Agent that handles
TL1 commands and a System Fault Manager that is responsible for state
changes.
The front panel of the SP front module has two craft interfaces:
•
An RS-232 serial craft interface operating at a fixed 9600 baud
•
A 10/100Base-T Ethernet craft interface.
5.4.2.1
General Mechanical Representation
The Dual SP3 front module is approximately 14 inches high and plugs into
the midplane for connections to the rear SP3 module and to the Switch
Fabric and IOMs. Refer to
for an illustration of the midplane
connector, the SP3 module and the front of the module.
The front plate of the module has three LEDs, an Ethernet connector and a
DB-9 RS-232 connector. Refer to
for a description of the
LEDs. Refer to
for the pin-out of the Ethernet connector and
for the pin-out of the craft connector.