BeagleBone BBONEBLK_SRM, Справочное руководство

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REF: BBONEBLK_SRM
BeagleBone Black System
Reference Manual
Rev A5.2
Page 33 of 108
Power routed to the board via the expansion header could be provided from power
derived on a cape. The DC supply should be well regulated and 5V +/-.25V.
5.9 Reset Button
When pressed and released, causes a reset of the board. The reset button used on the
BeagleBone Black is a little larger than the one used on the original BeagleBone. It has
also been moved out to the edge of the board so that it is more accessible.
5.10 Power Button
A power button is provided near the reset button close to the Ethernet connector. This
button takes advantage of the input to the PMIC for power down features. While a lot of
capes have a button, it was decided to add this feature to the board to insure everyone had
access to some new features. These features include:

Interrupt is sent to the processor to facilitate an orderly shutdown to save files and
to un-mount drives.

Provides ability to let processor put board into a sleep mode to save power.

Can alert processor to wake up from sleep mode and restore state before sleep was
entered.

Allows board to enter the sleep mode, preserving the RTC clock
If you hold the button down longer than 8 seconds, the board will power off if you release
the button when the power LED turns off. If you continue to hold it, the board will power
back up completing a power cycle.
5.11 Indicators
There are a total of five blue LEDs on the board.

One blue power LED indicates that power is applied and the power
management IC is up. If this LED flashes when applying power, it means
that an excess current flow was detected and the PMIC has shut down.

Four blue LEDs that can be controlled via the SW by setting GPIO pins.
In addition, there are two LEDs on the RJ45 to provide Ethernet status indication. One is
yellow (100M Link up if on) and the other is green (Indicating traffic when flashing).
5.12 CTI JTAG Header
A place for an optional 20 pin CTI JTAG header is provided on the board to facilitate the
SW development and debugging of the board by using various JTAG emulators. This