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AW00118702000

Pixel Data Output

Basler racer Camera Link

31

Fig. 10: Timing of Pixel Data Transmission for the 1X2 Tap Configuration

Pixel

Clock

D0

Pixel Data

(12, 10, or 8 bits)

W-3

W-1

1

3

1

D1

Pixel Data

(12, 10, or 8 bits)

W-2

W

2

4

2

3

4

Data

Valid

W-3

W-1

W-2

W

Line

Valid

Line N

Line N+1

C

B

B

End of
Exposure
of Line N+1

A

End of
Exposure
of Line N+2

TIMING DIAGRAMS ARE NOT DRAWN TO SCALE.

W = width = the last pixel according to the current image AOI (e.g., the 2048th pixel of the image AOI 
when the image AOI width is set to 2048).

Содержание racer

Страница 1: ...CAMERA LINK INFORMATION FOR FRAME GRABBER DESIGNERS Document Number AW001187 Version 02 Language 000 English Release Date 1 February 2013 Applies to prototype cameras only All content is subject to c...

Страница 2: ...ded in this manual must be used with this equipment in order to comply with the limits for a computing device pursuant to Subpart J of Part 15 of FCC Rules For customers in Canada This apparatus compl...

Страница 3: ...02 463 599 support europe baslerweb com Americas Basler Inc 855 Springdale Drive Suite 203 Exton PA 19341 U S A Tel 1 610 280 0171 Fax 1 610 280 7608 support usa baslerweb com Asia Basler Asia Pte Ltd...

Страница 4: ......

Страница 5: ...t 13 1 5 6 Pixel Data Bits 13 1 5 6 1 1X Tap Geometry 8 10 or 12 Bit Pixel Depth 14 1 5 6 2 1X2 Tap Geometry 8 10 or 12 Bit Pixel Depth 15 1 5 6 3 1X4 Tap Geometry 8 10 or 12 Bit Pixel Depth 16 1 5 6...

Страница 6: ...Table of Contents AW00118702000 ii Basler racer Camera Link...

Страница 7: ...se a DS90LV047A differential line transmitter Detailed data sheets for the National Semiconductor components are available at the National Semiconductor web site www national com The data sheets conta...

Страница 8: ...Table 1 1 2 SDR Connector Pin Assignments and Numbering Two 26 pin 0 03 pin spacing Shrunk Delta Ribbon SDR female connectors are used on the camera The pin assignments and pin numbering for the base...

Страница 9: ...17 X2 6 X3 Output Camera Link LVDS Data from transmitter circuit X 19 X3 5 XClk Output Camera Link LVDS Pixel clock from transmitter circuit X 18 XClk 7 SerTC Input RS 644 LVDS Serial communication da...

Страница 10: ...ink LVDS Pixel clock from transmitter circuit Y 18 YClk 7 T Connected to T with 100R not used 20 T Connected to T with 100R not used 8 Z0 Output Camera Link LVDS Data from transmitter circuit Z 21 Z0...

Страница 11: ...the 1X4 tap geometry which will cause it to operate in the medium Camera Link configuration In this situation the X and Y transmitters are used Fig 4 on page 8 illustrates the implementation when a c...

Страница 12: ...rt A4 Port A5 Port B0 Port B1 Port B2 Port B3 Port B4 Port B5 Port C0 Port C1 Port C2 Port C3 Port C4 Port C5 LVAL FVAL DVAL Port A6 Port A7 Port B6 Port B7 Port C6 Port C7 CL Spare Strobe PClk Tx0 Tx...

Страница 13: ...2 X0 X0 12 25 Port A0 Port A1 Port A2 Port A3 Port A4 Port A5 Port B0 Port B1 Port B2 Port B3 Port B4 Port B5 Port C0 Port C1 Port C2 Port C3 Port C4 Port C5 LVAL FVAL DVAL Port A6 Port A7 Port B6 Po...

Страница 14: ...Camera Link Implementation AW00118702000 8 Basler racer Camera Link Fig 4 Electrical Implementation Full Configuration Octo for 8 bit Pixel Formats...

Страница 15: ...AW00118702000 Camera Link Implementation Basler racer Camera Link 9 Fig 5 Electrical Implementation Full Configuration Octo for 10 bit Pixel Formats...

Страница 16: ...Camera Link Implementation AW00118702000 10 Basler racer Camera Link Fig 6 Electrical Implementation Full Configuration Deca...

Страница 17: ...set to accept an External Line Start Trigger ExLSTrig input signal to control exposure and readout of the camera s sensor When the ExLSTrig signal is applied to the camera via the Camera Link interfac...

Страница 18: ...information about the pixel clock speed see Section 2 on page 25 The pixel clock is assigned as defined in the Camera Link standard to the strobe ports TxClk pins of the following transmitter circuit...

Страница 19: ...ard defines a CL spare bit The camera can be configured to apply one of the following output signals to the CL Spare bit Line Trigger Wait Exposure Active 1 5 6 Pixel Data Bits Pixel data bits are tra...

Страница 20: ...Used D0 Bit 11 MSB Port B4 TxIn13 RxOut13 Not Used Not Used Not Used Port B5 TxIn14 RxOut14 Not Used Not Used Not Used Port B6 TxIn10 RxOut10 Not Used Not Used Not Used Port B7 TxIn11 RxOut11 Not Use...

Страница 21: ...D0 Bit 11 MSB Port B4 TxIn13 RxOut13 D1 Bit 4 D1 Bit 8 D1 Bit 8 Port B5 TxIn14 RxOut14 D1 Bit 5 D1 Bit 9 MSB D1 Bit 9 Port B6 TxIn10 RxOut10 D1 Bit 6 Not Used D1 Bit 10 Port B7 TxIn11 RxOut11 D1 Bit 7...

Страница 22: ...Bit 11 MSB Port B4 TxIn13 RxOut13 D1 Bit 4 D1 Bit 8 D1 Bit 8 Port B5 TxIn14 RxOut14 D1 Bit 5 D1 Bit 9 MSB D1 Bit 9 Port B6 TxIn10 RxOut10 D1 Bit 6 Not Used D1 Bit 10 Port B7 TxIn11 RxOut11 D1 Bit 7 M...

Страница 23: ...Port E4 TxIn13 RxOut13 Not Used D2 Bit 4 D2 Bit 4 Port E5 TxIn14 RxOut14 Not Used D2 Bit 5 D2 Bit 5 Port E6 TxIn10 RxOut10 Not Used D2 Bit 6 D2 Bit 6 Port E7 TxIn11 RxOut11 Not Used D2 Bit 7 D2 Bit 7...

Страница 24: ...RxOut8 D1 Bit 1 D1 Bit 3 Port B2 TxIn9 RxOut9 D1 Bit 2 D1 Bit 4 Port B3 TxIn12 RxOut12 D1 Bit 3 D1 Bit 5 Port B4 TxIn13 RxOut13 D1 Bit 4 D1 Bit 6 Port B5 TxIn14 RxOut14 D1 Bit 5 D1 Bit 7 Port B6 TxIn...

Страница 25: ...E0 TxIn7 RxOut7 D4 Bit 0 D4 Bit 2 Port E1 TxIn8 RxOut8 D4 Bit 1 D4 Bit 3 Port E2 TxIn9 RxOut9 D4 Bit 2 D4 Bit 4 Port E3 TxIn12 RxOut12 D4 Bit 3 D4 Bit 5 Port E4 TxIn13 RxOut13 D4 Bit 4 D4 Bit 6 Port E...

Страница 26: ...rt H0 TxIn7 RxOut7 D7 Bit 0 D7 Bit 2 Port H1 TxIn8 RxOut8 D7 Bit 1 D7 Bit 3 Port H2 TxIn9 RxOut9 D7 Bit 2 D7 Bit 4 Port H3 TxIn12 RxOut12 D7 Bit 3 D7 Bit 5 Port H4 TxIn13 RxOut13 D7 Bit 4 D7 Bit 6 Por...

Страница 27: ...Bit 1 Port B2 TxIn10 RxOut10 D1 Bit 2 Port B3 TxIn11 RxOut11 D1 Bit 3 Port B4 TxIn12 RxOut12 D1 Bit 4 Port B5 TxIn13 RxOut13 D1 Bit 5 Port B6 TxIn14 RxOut14 D1 Bit 6 Port B7 TxIn15 RxOut15 D1 Bit 7 M...

Страница 28: ...RxOut10 D4 Bit 4 Port E5 TxIn11 RxOut11 D4 Bit 5 Port E6 TxIn12 RxOut12 D4 Bit 6 Port E7 TxIn13 RxOut13 D4 Bit 7 MSB Port F0 TxIn14 RxOut14 D5 Bit 0 Port F1 TxIn15 RxOut15 D5 Bit 1 Port F2 TxIn16 RxO...

Страница 29: ...RxOut10 D7 Bit 7 MSB Port I0 TxIn11 RxOut11 D8 Bit 0 Port I1 TxIn12 RxOut12 D8 Bit 1 Port I2 TxIn13 RxOut13 D8 Bit 2 Port I3 TxIn14 RxOut14 D8 Bit 3 Port I4 TxIn15 RxOut15 D8 Bit 4 Port I5 TxIn16 RxOu...

Страница 30: ...Camera Link Implementation AW00118702000 24 Basler racer Camera Link...

Страница 31: ...data are transmitted for each pixel When a camera is set for a 10 bit format 10 bits of image data are transmitted for each pixel When a camera is set for a 12 bit format 12 bits of image data are tr...

Страница 32: ...in Fig 10 on page 31 The pixel clock frequency depends on the current setting of the camera s Camera Link Clock Speed parameter See Table 14 for the available Camera Link pixel clock speeds and the r...

Страница 33: ...e Offset X parameter for the image AOI is set to 16 pixels and that the Width parameter for the image AOI is set to 24 pixels In this case the delays would be Formula 1 Formula 2 Formula 3 A 22 3 s Im...

Страница 34: ...the next pixel in the line on the third clock cycle and so on until the line is complete When transmission for the line is complete transmission for the next line acquisition will begin after a time i...

Страница 35: ...ion End of Exposure Pixel Clock D0 Pixel Data 12 10 or 8 bits W 1 W 1 2 1 2 Data Valid W 1 W A Line Valid Line Acquisition N Line Acquisition N 1 C B TIMING DIAGRAMS ARE NOT DRAWN TO SCALE W width the...

Страница 36: ...xt two pixels in the line on the third clock cycle and so on until the line is complete When transmission for the line is complete transmission for the next line acquisition will begin after a time in...

Страница 37: ...or 8 bits W 3 W 1 1 3 1 D1 Pixel Data 12 10 or 8 bits W 2 W 2 4 2 3 4 Data Valid W 3 W 1 W 2 W Line Valid Line N Line N 1 C B B End of Exposure of Line N 1 A End of Exposure of Line N 2 TIMING DIAGRA...

Страница 38: ...pixels in the line on the third clock cycle and so on until the line is complete When transmission for the line is complete transmission for the next line acquisition will begin after a time interval...

Страница 39: ...Pixel Data 12 10 or 8 bits W 6 W 2 2 6 2 5 6 Data Valid W 7 W 3 W 6 D2 Pixel Data 12 10 or 8 bits W 5 W 1 3 7 3 7 W 5 D3 Pixel Data 12 10 or 8 bits W 4 W 4 8 4 8 W 4 W 2 W 1 W C B B A End of Exposure...

Страница 40: ...ght pixels in the line on the third clock cycle and so on until the line is complete When transmission for the line is complete transmission for the next line acquisition will begin after a time inter...

Страница 41: ...W 11 W 3 5 13 D5 Pixel Data 10 or 8 bits W 10 W 2 6 14 D6 Pixel Data 10 or 8 bits W 9 W 1 7 15 D7 Pixel Data 10 or 8 bits W 8 W 8 16 W 15 W 7 1 9 W 14 W 6 2 10 W 13 W 5 3 11 W 12 W 4 4 12 W 11 W 3 5...

Страница 42: ...the line on the third clock cycle and so on until the line is complete When transmission for the line is complete transmission for the next line acquisition will begin after a time interval see Fig 15...

Страница 43: ...13 W 3 7 17 D7 Pixel Data 8 bits W 12 W 2 8 18 D8 Pixel Data 8 bits W 11 W 1 9 19 D9 Pixel Data 8 bits W 10 W 10 20 14 W 9 W 8 W 7 W 6 W 5 W 4 W 19 1 11 W 18 2 12 W 17 3 13 W 16 4 W 15 5 15 W 14 6 16...

Страница 44: ...Pixel Data Output AW00118702000 38 Basler racer Camera Link...

Страница 45: ...only AW00118702000 1 Feb 2013 Initial release of this document applying to series production status Updated the e mail addresses for Basler technical support Added descriptions of the 1X tap geometry...

Страница 46: ...Revision History AW00118702000 40 Basler racer Camera Link...

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