Basler Vision Technologies Sprint Series, Руководство пользователя

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Video Data Output Modes
88 Basler sprint Mono Cameras
5.2 Video Data Output Mode Details
5.2.1 2 Tap Output Modes
2 Tap - 12 Bit Output Mode
In 2 tap 12 bit mode, on each pixel clock cycle, the camera transmits data for two pixels at 12 bit
depth, a line valid bit, and a data valid bit.
In the 2 tap output modes, the camera uses the output ports on Camera Link Transmitter X to
transmit pixel data, a line valid bit, a data valid bit, and a pixel clock. The assignment of the bits to
the output ports on Camera Link Transmitter X is as shown in Table 12 on
page 90 .
The Camera Link clock is used to time the transmission of acquired pixel data. As shown in
Figure 35 on
page 91 and Figure 36 on page 92 , the camera samples and transmits data on each
rising edge of the clock. The Camera Link pixel clock frequency is as stated in Section 2.8.4 on
page 35 .
The line valid bit indicates that a valid line is being transmitted. The data valid bit indicates that valid
pixel data is being transmitted. Pixel data is only valid when the line valid and data valid bits are
both high.
2 Tap - 10 Bit Output Mode
Operation in 2 tap 10 bit mode is similar to 2 tap 12 bit mode. In 10 bit mode, however, the two least
significant bits output from the camera’s ADCs are dropped and only the 10 most significant bits of
data per pixel are transmitted.
Note
The following values for line valid and frame valid delays apply to line
acquisitions at full resolution. If a shorter AOI is used, the values for line valid
and frame valid delays may be smaller or larger, depending on the size and
position of the AOI.
Note
The bit depths of the video data output modes have no effect on the values for
line valid and frame valid delays.