MVP3 ATX
SYSTEM BOARD
AWARD BIOS SETUP
4-42
4.9
INTEGRATED PERIPHERALS
ROM PCI / ISA BIOS (2A5LEXXX)
INTEGRATED PERIPHERALS
AWARD SOFTWARE, INC.
On-Chip IDE First Channel
: Enabled
Onboard Parallel Port
: 378 / IRQ 7
On-Chip IDE Second Channel : Enabled
Onboard Parallel Mode
: SPP
IDE Prefetch Mode
: Enabled
IDE HDD Block Mode
: Enabled
IDE Primary Master PIO
: Auto
IDE Primary Slave PIO
: Auto
IDE Secondary Master PIO
: Auto
IDE Secondary Slave PIO
: Auto
IDE Primary Master UDMA
: Auto
IDE Primary Slave UDMA
: Auto
IDE Secondary Master UDMA : Auto
IDE Secondary Slave UDMA
: Auto
Init Display First
: PCI Slot
Onboard FDC Controller
: Enabled
Onboard Serial Port 1
: 3F8 / IRQ 4
ESC : Quit
áâßà
: Select Item
Onboard Serial Port 2
: 2F8 / IRQ 3
F1
: Help
PU/PD/+/- : Modify
UART 2 Mode
: Standard
F5
: Old Values
(Shift)F2 : Color
F7
: Load Setup Defaults
Fig. 4-8 INTEGRATED PERIPHERALS setup screen.
WARNING :
The selection fields on this screen are provided for the professional
technician who can modify the Chipset features to meet some specific
requirement. If you do not have the related technical background, do
not attempt to make any change except the following items.
UART 2 Mode :
This setting determines the IR port (CN7) function mode. Supports both HPSIR and
ASKIR.
Onboard Parallel Mode :
This setting determines the onboard parallel port (CN6) transmission mode. Supports
either SPP, EPP, ECP, or ECP+EPP.