AZZA PT-5IT, Руководство по эксплуатации

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PT-5IT
SYSTEM BOARD
HARDWARE SETUP
3
(1) SIMM1 - SIMM4 : + 5V DC
(2) DIMM1 - DIMM2 : +3.3V DC or +5V DC
(factory default at +3.3V DC, adjusted by “purchase order”)
DRAM Bank can be populated in any order (bank 0 does not have to be populated
before bank 1).Within any given bank, the SIMMs (DIMM) must be the same size.
Among the two banks, SIMM (DIMM) densities can be mixed in any order. EDO, FPM
and SDRAMs can be mixed between SIMMs (DIMM), a given SIMM (DIMM) must
contain only one type of DRAM. When DRAM types are mixed each SIMM (DIMM)
runs optimized for that particular type of DRAM.
There is no jumper needed for DRAM configuration, DRAMs' type and size will be
detected by system BIOS automatically.
The following table provides the possable combinations for DRAM memory
installation.
Bank 0 Bank 1
SIMM1 and SIMM2 DIMM1 SIMM3 and SIMM4 DIMM2
Single-sided Empty Single-sided Empty
Double-sided Empty Double-sided Empty
Empty Single-sided Empty Single-sided
Empty Double-sided Empty Double-sided
Note : We strong recommend, Don't install 5V SIMM module and 3.3V DIMM
modules at the same time.
1. L2 CACHE MEMORY INSTALLATION
The PT-5IT system board will support 256KB or 512KB cache memory on board, using
synchronous pipeline-burst SRAMs. Both Write Back and Write Through cache update
policy are supported.
The following table lists the detalied combination about cache memory installation.
Cache Size Data SRAMs(U7 , U8) Tag SRAMs(U1)
256 KB 32KB x 32 8KB or 16KB or 32KB x 8
512 KB 64KB x 32 16KB or 32KB x 8