The
AZZA
P4M Mainboard Series
Page 34
VIA OnChip IDE Device
When you press enter the following menu will appear:
CMOS Setup Utility - Copyright (C) 1984 - 2001 Award Software
Integrated Peripherals
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VIA OnChip IDE Device
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VIA OnChip PCI Device
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SuperIO Device
Init Display First
OnChip USB Controller
USB Keyboard Support
IDE HDD Block Mode
Onboard LAN Boot ROM
Item Help
Menu Level
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[Press Enter]
[Press Enter]
[Press Enter]
[PCI Slot]
[All Enabled]
[Disabled]
[Enabled]
[Disabled]
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OnChip IDE Channel 0/1
The chipset contains a PCI IDE interface with support for two IDE channels.
To activate the primary IDE interface select Enabled. If you want to disable
the onboard IDE 1 and/or 2, then select Disabled and this interface will be
deactivated.
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OnChip IDE Channel 0/1
The chipset contains a PCI IDE interface with support for two IDE channels.
To activate the primary IDE interface select Enabled. If you want to disable
the onboard IDE 1 and/or 2, then select Disabled.
CMOS Setup Utility - Copyright (C) 1984 - 2001 Award Software
VIA OnChip IDE Device
OnChip IDE Channel0
OnChip IDE Channel1
IDE Prefetch Mode
Primary Master PIO
Primary Slave PIO
Secondary MasterPIO
Secondary Slave PIO
Primary Master UDMA
Primary Slave UDMA
Secondary MasterUDMA
Secondary Slave UDMA
Item Help
Menu Level
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[Enabled]
[Enabled]
[Enabled]
[Auto]
[Auto]
[Auto]
[Auto]
[Auto]
[Auto]
[Auto]
[Auto]
FB Address Conversion
Enabling this field will optimize the memory allocation table for VGA frame
buffer accesses according to the DRAM page size in use. Enabling this field
should improve VGA performance.
FB Page Close Prediction
If this field is enabled the FB DRAM pages that are no longer needed in the
tiling address mode will be automatically closed.
3.6. Integrated Peripherals
Managing the PC BIOS