AZZA P4M2-BL, Руководство пользователя

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The AZZA P4M Mainboard Series Page 31
Dram Clock Drive Control
This field allows you to select the FSB and DRAM frequency. When you press
enter the following menu will appear.
! ! ! !
DRAM Clock/Drive Control
!
! !
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AGP & P2P Bridge Control
!
! !
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CPU & PCI Bus Control
Memory Hole
System BIOS Cacheable
Video RAM Cacheable
Delay Prior To Thermal
VGA Share Memory Size
FB Address Conversion
FB Page Close Prediction
Item Help
Menu Level
!
! !
!
CMOS Setup Utility - Copyright (C) 1984 - 2001 Award Software
Advanced Chipset Features
[Press Enter]
[Press Enter]
[Press Enter]
[Disabled]
[Disabled]
[Disabled]
[16 Min]
[32M]
[Enabled]
[Enabled]
3.5. Advanced Chipset Features
Current FSB Frequency
Current DRAM Frequency
DRAM Clock
DRAM Timing
X SDRAM CAS Latency
X Bank Interleave
X Precharge to Active (Trp)
X Active to Precharge (Tras)
X Active to CMD (Trcd)
XDRAM Command Rate
DRAM Burst Len
CPU read DRAM Mode
Item Help
Menu Level
!!
!! !!
!!
CMOS Setup Utility - Copyright (C) 1984 - 2001 Award Software
DRAM Clock/Drive Control
100 MHz
133 MHz
[By SPD]
[By SPD]
2.5
[Disabled]
3T
6T
3T
2T Command
[4]
[Medium]
!
Current FSB Frequency
The setting for this field will be automatically selected by the BIOS.
!
Current Dram Frequency
The setting for this field will be automatically detected by the BIOS. The
value that is selected in derived from the RAM clock.
!
DRAM Clock
When you press enter you will have three options:
By SPD :The BIOS will automatically detect the actual DRAM Clock.
100 MHz :The DRAM clock speed will be PC1600 (100 MHz DDR).
133 MHz :The DRAM clock speed will be PC2100 (133 MHz DDR).
Managing the PC BIOS