Atten ATM3500A, Руководство пользователя

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The following conditions will clear the standard event register.

You send a *CLS command.

You query the event register by using the *ESR? command.
The following conditions will clear the standard event enable register.

You turn on the power, and have set the DMM previously by using
the *PSC 1 command.

You execute a *ESE 0 command.
Note: When the DMM is powered on, the standard event enable
※
register won’t be cleared if you have set the DMM previously by using
*PSC 0.
About the Questionable Data Register
The questionable data register reports the quality of the DMM’s
measurement results, as well overload conditions and high/low limit
test results. Through the enable register, all of the conditions can be
reported in the questionable data summary bit. At the moment, you
have to write a decimal value by using the
STATus:QUESTionable:ENABle command to set the enable register
mask.
Bit Definitions for Questionable Data Register
Bit Decimal
Value
Definition
0.
Voltage Overload
1 Range overload on dc/ac volts, frequency, period, diode or ratio
function
1.
Current Overload
2 Range overload on dc/ac current function.
2.
Not Used
4 Set to 0
3.
Not Used
8 Set to 0
4.
Not Used
16 Set to 0
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