Atmel SAM4S Series, Предварительный информационный лист

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808
11100B–ATARM–31-Jul-12
SAM4S Series [Preliminary]
35.5.2 Power Management
The TC is clocked through the Power Management Controller (PMC), thus the programmer must
first configure the PMC to enable the Timer Counter clock.
35.5.3 Interrupt
The TC has an interrupt line connected to the Interrupt Controller (IC). Handling the TC interrupt
requires programming the IC before configuring the TC.
35.5.4 Fault Output
The TC has the FAULT output internally connected to the fault input of PWM. Refer to Section
35.6.17 ”Fault Mode”, and to the product Pulse Width Modulation (PWM) implementation.
35.6 Functional Description
35.6.1 TC Description
The 3 channels of the Timer Counter are independent and identical in operation except when
quadrature decoder is enabled. The registers for channel programming are listed in
Table 35-5
on page 832 .
35.6.2 16-bit Counter
Each channel is organized around a 16-bit counter. The value of the counter is incremented at
each positive edge of the selected clock. When the counter has reached the value 0xFFFF and
passes to 0x0000, an overflow occurs and the COVFS bit in TC_SR (Status Register) is set.
The current value of the counter is accessible in real time by reading the Counter Value Regis-
ter, TC_CV. The counter can be reset by a trigger. In this case, the counter value passes to
0x0000 on the next valid edge of the selected clock.
35.6.3 Clock Selection
At block level, input clock signals of each channel can either be connected to the external inputs
TCLK0, TCLK1 or TCLK2, or be connected to the internal I/O signals TIOA0, TIOA1 or TIOA2
for chaining by programming the TC_BMR (Block Mode). See
Figure 35-2 ”Clock Chaining
Selection” .
Each channel can independently select an internal or external clock source for its counter:
• Internal clock signals: TIMER_CLOCK1, TIMER_CLOCK2, TIMER_CLOCK3,
TIMER_CLOCK4, TIMER_CLOCK5
• External clock signals: XC0, XC1 or XC2
This selection is made by the TCCLKS bits in the TC Channel Mode Register.
TC1 TIOA4 PC26 B
TC1 TIOA5 PC29 B
TC1 TIOB3 PC24 B
TC1 TIOB4 PC27 B
TC1 TIOB5 PC30 B
Table 35-4. I/O Lines