Atmel AVR XMEGA D Series, Руководство пользователя, Страница: 155 / 331

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8210C–AVR–09/11
Atmel AVR XMEGA D
12.11.12 CNTL – Counter register L
The CNTH and CNTL register pair represents the 16-bit value, CNT. CNT contains the 16-bit
counter value in the timer/counter. CPU write access has priority over count, clear, or reload of
the counter.
For more details on reading and writing 16-bit registers, refer to ”Accessing 16-bit Registers” on
page 11 .
• Bit 7:0 – CNT[7:0]
These bits hold the LSB of the 16-bit counter register.
12.11.13 CNTH – Counter register H
• Bit 7:0 – CNT[15:8]
These bits hold the MSB of the 16-bit counter register.
12.11.14 PERL – Period register L
The PERH and PERL register pair represents the 16-bit value, PER. PER contains the 16-bit
TOP value in the timer/counter.
• Bit 7:0 – PER[7:0]
These bits hold the LSB of the 16-bit period register.
Bit 7 6 5 4 3 2 1 0
+0x0F TEMP[7:0] TEMP
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
+0x20 CNT[7:0] CNTL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
+0x21 CNT[15:8] CNTH
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0
+0x26 PER[7:0] PERL
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value 1 1 1 1 1 1 1 1