Artesyn MaxCore MC1600, Инструкция по установке и эксплуатации, Страница: 49 / 118

System Overview
MC1600 Extreme Edge Server Installation and Use (6806870A02A) 47
The Host SMBus interface (SMBCLK, SMBDATA) is connected to the XDP connector and to the
point of load power controllers for VCCIN and VDDQ (IR3584 devices). It also connects to a
local accelerometer that can be used for debug of vibration related issues (CPU1 SMBus only).
The SM Link 0 interface (SML0CLK, SML0DATA) from CPU1 is routed to the BMC. This interface
is used to read thermal sensors in the CPU and on the DIMM modules. The BMC also uses this
interface for communication with the CPU CPLD to control the card and read status registers.
The SM Link 1 interface (SML1CLK, SML1DATA) of each CPU is not used.
The DDR I
2
C interface (DDR_SDA, DDR_SCL) is connected to the DIMM slots. The interface is
used to read the SPD EEPROM and the integrated thermal sensor of the DIMM modules.
1.7.7 LPC Interface
The LPC interface of each CPU is connected to an optional TPM module.
The LPC interface of each processor is also connected to the CPU CPLD to allow Port80 post
code forwarding and as a communication channel to the CPLD registers. The LPC interface of
CPU1 is also routed to the Glue CPLD for access to the status and control registers of the SFP+
modules.
The LPC interface of CPU1 is also directly connected to the BMC LPC pins.
1.7.8 PECI Interface
The Platform Environment Control Interface (PECI) uses a single wire for self-clocking and data
transfer. The bus requires no additional control lines. The interface design is optimized for
interfacing to Intel processor (CPU) and chipset components (PCH) in both single processor
and multiple processor environments.
The processor PECI client is designed to support processor and DRAM thermal management,
platform manageability functions including thermal, power, and error monitoring, as well as
processor interface tuning and diagnostics capabilities.
The PECI interface is connected between CPU and PCH, both integrated in the Broadwell-DE
SoC.