Analog Devices EZ-KIT Lite ADSP-BF533, Руководство пользователя

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ADSP-BF533 EZ-KIT Lite Evaluation System Manual 3-7
EZ-KIT Lite Hardware Reference
Video Output Mode
In the video output mode, the PPI interface is configured as output and
connects to the on-board video encoder device, ADV7171. The
ADV7171 encoder device generates three analog video channels on
DAC B
,
DAC C
, and
DAC D
outputs. The PPI data connects to
P7–0
of the encoder’s
pixel inputs. The encoder’s PPI input clock runs at 27 MHz, and it is in
phase with
CLK IN
of the ADSP-BF533 processor.
The encoder’s synchronization signals,
HSYNC
and
VSYNC
, can be config-
ured as inputs or outputs. Video Blanking control signal is at level “
1
”.
The
HSYNC
and
VSYNC
signals can be connected to the ADSP-BF533 pro-
cessor’s multiplexed sync pins and to the on-board video decoder,
ADV7183, via the
SW3
switch, as described in “Video Configuration
Switch (SW3)” on page 3-11 .
Video Input Mode
In the video input mode, the PPI interface is configured as input and con-
nects to the on-board video decoder device, ADV7183. The ADV7183
decoder receives three analog video channels on
AIN1
,
AIN4
, and
AIN5
input. The decoder’s pixel data outputs
P15–8
drive the PPI data (
PPI3–0
and
PF15–12
). The decoder’s 27 MHz pixel clock output can be selected to
drive PPI clock, as shown in Table 2-8 on page 2-8 .
Synchronization outputs of the decoder,
HS/HACTIVE
,
VS/VACTIVE
, and
FIELD
can connected to the ADSP-BF533 processor’s multiplexed sync
pins and to the on-board video encoder, ADV7171, via the
SW3
DIP
switch, as described in “Video Configuration Switch (SW3)” on
page 3-11 .