ADSP-BF533 EZ-KIT Lite Evaluation System Manual
3-11
EZ-KIT Lite Hardware Reference
Test DIP Switches (SW2–1)
Two DIP switches (
SW1
and
SW2
) are located on the bottom of the board.
The switches are used only for testing and should always be in the “
OFF
”
position.
Video Configuration Switch (SW3)
The video configuration switch (
SW3
) controls how some video signals
from the ADV7183 video decoder and ADV7171 video encoder are
routed to the processor’s PPI. The switch also determines if the
PF2
pin
controls the OE of the ADV7183 video decoder outputs.
which processor’s signals are connected to the encoder and decoder when
in the “
ON
” position.
Positions 1 thorough 5 of
SW3
determine how and if the
VSYNC
,
HSYNC
, and
FIELD
control signals are routed to the processors PPI. In standard config-
uration of the encoder and decoder, this is not necessary because the
processor is capable of reading the embedded control information, which
is in the data stream.
Table 3-6. Video Configuration Switch (SW3)
Switch Position (Default)
Processor Signal
Video Signal
1 (
OFF
)
TMR1
(
HSYNC
)
HSYNC
(ADV7171)
2 (
OFF
)
TMR1
(
HSYNC
)
HS
(ADV7183)
3 (
OFF
)
TMR2
(
VSYNC
)
VS
(ADV7183)
4 (
OFF
)
TMR2
(
VSYNC
)
VSYNC
(ADV7171)
5 (
OFF
)
PF3
(
FIELD
)
FIELD
(ADV7183)
6 (
ON
)
PF2
~OE
(ADV7183)
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