Analog Devices EZ-KIT Lite ADSP-BF533, Руководство пользователя

Страница: 47 / 108

ADSP-BF533 EZ-KIT Lite Evaluation System Manual 2-7
Using EZ-KIT Lite
Flash General-Purpose IO
This section describes general-purpose IO signals that are controlled by
means of setting appropriate registers of the Flash A or Flash B. These reg-
isters are mapped into the processor’s address space, as shown in
Table 2-5
on page 2-7 .
Flash device IO pins are arranged as 8-bit ports labeled
A
through
G
. There
is a set of 8-bit registers associated with each port. These registers are:
Direction
,
Data In
, and
Data Out
. Note that the
Direction
and
Data Out
registers are cleared to all zeros at power-up or hardware reset.
The
Direction
register controls IO pins direction. When a bit is
0
, a cor-
responding pin functions as an input. When a bit is
1
, a corresponding pin
is an output. This is a 8-bit read-write register.
The
Data In
register allows reading the status of port’s pins. This is a
8-bit read-only register.
Table 2-5. Flash Memory Map
Start Address End Address Content
0x2000 0000 0x200F FFFF
Flash A Primary (1MB)
0x2010 0000 0x201F FFFF
Flash B Primary (1MB)
0x2020 0000 0x2020 FFFF
Flash A Secondary (64KB)
0x2024 0000 0x2024 7FFF
Flash A SRAM (32KB)
0x2027 0000 0x2027 00FF
Flash A Registers (256 Bytes)
0x2028 0000 0x2028 FFFF
Flash B Secondary (64KB)
0x202C 0000 0x202C 7FFF
Flash B SRAM (32KB)
0x202E 0000 0x202E 00FF
Flash B Registers (256 Bytes)
All other locations Reserved