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Evaluation Board User Guide 

UG-161

 

Rev. 0 | Page 3 of 12 

EVALUATION BOARD HARDWARE 

HARDWARE DESCRIPTION 

The evaluation board package includes a cable for connecting the 
EVAL-ADF411xEBZ1 to the printer port of a PC. The silkscreen 
and cable diagram for the evaluation board are shown in Figure 2 
and Figure 3. The test setup configuration is shown in Figure 4
The board schematics are shown in Figure 7 and Figure 8

09

14

6-

00

2

 

Figure 2. Evaluation Board Silkscreen 

The evaluation board is powered from a single 9 V battery. The 
power supply circuitry allows the user to individually choose 
either 3 V or 5 V for the V

DD

 of the frequency synthesizer, the 

V

P

 of the frequency synthesizer, and the supply of the VCO. The 

default settings are 3 V for the V

DD

 of the frequency synthesizer 

and 5 V for the V

P

 of the frequency synthesizer and for the 

supply of the VCO. 

It is important to note that the V

DD

 of the frequency synthesizer 

should never exceed the V

P

 of the frequency synthesizer because 

damage to the device may result.  

All components necessary for LO generation are catered for on 
board. A temperature compensated crystal oscillator (TCXO) 
connector provides the necessary reference input. The PLL 
comprises the frequency synthesizer, the passive loop filter, and 
the VCO. The output is available at RFOUT through a standard 
SMA connector. A different reference input and different power 
supplies than those included with the evaluation board package 
can be used, if desired. In this case, insert SMA connectors as 
shown in the silkscreen (Figure 2) and the cable diagram (Figure 3).  

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14

2

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3

16

4

17

PC

5

1

2

3

4

6

7

8

9

5

18

6

19

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8

21

9

22

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11

24

12

PURPLE

BLUE

YELLOW

RED—LE

BLACK—CLK

BROWN—DATA

ORANGE—CE

WHITE—GND

13

25

25-WAY

MALE D-TYPE

TO

PC PRINTER PORT

9-WAY

FEMALE D-TYPE

TO

ADF411x

EVALUATION

BOARD

EVAL-ADF411xEBZ1

0

91

46

-00

3

 

Figure 3. PC Cable Diagram 

LOOP DESIGN 

The evaluation board package does not include a VCO, loop 
filter, or frequency synthesizer. The frequency synthesizer and 
VCO are chosen by the user, depending on the frequency and 
application requirements. The filter can then be designed based 
on these requirements by using the ADIsimPLL software. This 
software, which is provided on the CD-ROM included in the 
evaluation board package, allows the user to enter the loop 
parameters. The software then designs the filter and shows the 
frequency and time domain analysis of the filter response. The 
software also offers useful schematic and report options. 

 

www.BDTIC.com/ADI

Содержание EVAL-ADF411xEBZ1

Страница 1: ...RIPTION The EVAL ADF411xEBZ1 evaluation board is designed to evaluate the performance of the ADF4110 ADF4111 ADF4116 ADF4117 and ADF4107 frequency synthesizers for phase locked loops PLLs Figure 1 is the functional block diagram of the board and shows the frequency synthesizer a PC connector and an SMA connector for the reference input the power supplies and an RF output There are also footprints ...

Страница 2: ...l Block Diagram 1 Revision History 2 Evaluation Board Hardware 3 Hardware Description 3 Loop Design 3 Evaluation Board Software 5 Integer N Software Description 5 Fractional N Software Description 6 Evaluation Board Schematics 7 Bill of Materials 9 REVISION HISTORY 8 11 Revision 0 Initial Version www BDTIC com ADI ...

Страница 3: ... provides the necessary reference input The PLL comprises the frequency synthesizer the passive loop filter and the VCO The output is available at RFOUT through a standard SMA connector A different reference input and different power supplies than those included with the evaluation board package can be used if desired In this case insert SMA connectors as shown in the silkscreen Figure 2 and the c...

Страница 4: ...er Guide Rev 0 Page 4 of 12 09146 006 OSCILLOSCOPE SPECTRUM ANALYZER PC CONNECTOR 9V BATTERY ADF411x EVAL ADF411xEBZ1 MUXOUT RFOUT POWER SWITCH ON OFF PC VCO TCXO SMA SOCKET SMA SOCKET Figure 4 Evaluation Setup www BDTIC com ADI ...

Страница 5: ...ard The software is installed into the default directory C Program Files Analog Devices ADF_Rev3 x 5 Click RF VCO Output Frequency and the Output Frequency window appears Type the RF output frequency and PFD reference frequency into the appropriate boxes and click OK Using the Software 6 Click RF Charge Pump Current Setting 2 or RF Charge Pump Current Setting 1 and the Current Setting window appea...

Страница 6: ..._Frac directory double click ADF_Frac_Revx exe 3 A dialog box appears asking which device is to be evaluated Select the appropriate device and click OK The Analog Devices Evaluation Software window appears see Figure 6 4 Click RF VCO Output Frequency and the Output Frequency window appears Type the RF output frequency PFD frequency reference frequency and channel spacing into the appropriate boxes...

Страница 7: ...Evaluation Board User Guide UG 161 Rev 0 Page 7 of 12 EVALUATION BOARD SCHEMATICS 09146 004 Figure 7 Evaluation Board Circuit Diagram Page 1 www BDTIC com ADI ...

Страница 8: ...UG 161 Evaluation Board User Guide Rev 0 Page 8 of 12 09146 005 Figure 8 Evaluation Board Circuit Diagram Page 2 www BDTIC com ADI ...

Страница 9: ...46 Yes Yes C22 Capacitor 4 7 μF 10 V CAP TAJ_A FEC 498 658 Yes Yes C23 Capacitor 1 μF CAP TAJ_A FEC 498 701 Yes Yes C24 Capacitor 10 nF 0603 FEC 499 146 Yes Yes C25 Capacitor 4 7 μF 10 V CAP TAJ_A FEC 498 658 Yes Yes D1 LED Green LED FEC 657 141 No No D2 Diode DO35 FEC 365 117 No Yes D3 SD103C 6 2 V DO35 SD103C No Yes D4 LED Red LED FEC 657 130 No Yes J1 CON DB9HM DB9 HM FEC 150 750 No Yes J2 SMA ...

Страница 10: ...es R20 Resistor 330 kΩ 0603 FEC 911 537 Yes Yes R21 Resistor 4 7 kΩ 0805 FEC 911 318 Yes Yes S1 SW_POWER SW_SIP 3P FEC 150 559 No Yes T1 Test point TESTPOINT FEC 240 345 No Yes T2 Test point TESTPOINT FEC 240 345 No Yes T3 Test point TESTPOINT FEC 240 345 No Yes T4 Test point TESTPOINT FEC 240 345 No Yes T5 Test point TESTPOINT FEC 240 345 No Yes T6 Test point TESTPOINT FEC 240 345 No Yes T7 Test ...

Страница 11: ...Evaluation Board User Guide UG 161 Rev 0 Page 11 of 12 NOTES www BDTIC com ADI ...

Страница 12: ...for any reason Upon discontinuation of use of the Evaluation Board or termination of this Agreement Customer agrees to promptly return the Evaluation Board to ADI ADDITIONAL RESTRICTIONS Customer may not disassemble decompile or reverse engineer chips on the Evaluation Board Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board inclu...

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