Analog Devices dBCool ADT7476, Руководство пользователя

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ADT7476
Rev. B | Page 45 of 72
Programming the PWM
MIN
Registers
The PWM
MIN
registers are 8-bit registers that allow the mini-
mum PWM duty cycle for each output to be configured
anywhere from 0% to 100%. This allows the minimum PWM
duty cycle to be set in steps of 0.39%.
The value to be programmed into the PWM
MIN
register is
given by
Value (decimal) = PWM
MIN
/0.39
Example 1: For a minimum PWM duty cycle of 50%
Value (decimal) = 50/0.39 = 128 (decimal)
Value = 128 (decimal) or 80 (hex)
Example 2: For a minimum PWM duty cycle of 33%
Value (decimal) = 33/0.39 = 85 (decimal)
Value = 85 (decimal) or 54 (hex)
PWM
MIN
Registers
Register 0x64, PWM1 Minimum Duty Cycle = 0x80 (50% default)
Register 0x65, PWM2 Minimum Duty Cycle = 0x80 (50% default)
Register 0x66, PWM3 Minimum Duty Cycle = 0x80 (50% default)
Note on Fan Speed and PWM Duty Cycle
The PWM duty cycle does not directly correlate to fan speed in
RPM. Running a fan at 33% PWM duty cycle does not equate to
running the fan at 33% speed. Driving a fan at 33% PWM duty
cycle actually runs the fan at closer to 50% of its full speed. This
is because fan speed in %RPM generally relates to the square
root of the PWM duty cycle. Given a PWM square wave as the
drive signal, fan speed in RPM approximates to
% fanspeed =
10
×
Cycle Duty PWM
STEP 5: PWM
MAX
FOR PWM (FAN) OUTPUTS
PWM
MAX
is the maximum duty cycle at which each fan in the
system runs under the automatic fan speed control loop. For
maximum system acoustic benefit, PWM
MAX
should be as low as
possible but should be capable of maintaining the processor
temperature limit at an acceptable level. If the THERM temper-
ature limit is exceeded, the fans are still boosted to 100% for
fail-safe cooling.
There is a PWM
MAX
limit for each fan channel. The default value
of this register is 0xFF and has no effect unless it is programmed.
TEMPERATURE T
MIN
100%
PWM
MIN
0%
P
W
M DUTY
CY
CLE
PWM
MAX
05382-057
Figure 56. PWM
MAX
Determines Maximum PWM Duty Cycle
Below the THERM Temperature Limit
Programming the PWM
MAX
Registers
The PWM
MAX
registers are 8-bit registers that allow the
maximum PWM duty cycle for each output to be configured
anywhere from 0% to 100%. This allows the maximum PWM
duty cycle to be set in steps of 0.39%.
The value to be programmed into the PWM
MAX
register is
given by
Value (decimal) = PWM
MAX
/0.39
Example 1: For a maximum PWM duty cycle of 50%
Value (decimal) − 50/0.39 = 128 (decimal)
Value = 128 (decimal) or 80 (hex)
Example 2: For a minimum PWM duty cycle of 75%
Value (decimal) = 75/0.39 = 85 (decimal)
Value = 192 (decimal) or C0 (hex)
PWM
MAX
Registers
Register 0x38, PWM1 Maximum Duty Cycle = 0xFF
(100% default)
Register 0x39, PWM2 Maximum Duty Cycle = 0xFF
(100% default)
Register 0x3A, PWM3 Maximum Duty Cycle = 0xFF
(100% default)
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