Analog Devices ADXL180 iMEMS, Руководство пользователя

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ADXL180
Rev. 0 | Page 37 of 56
WAIT 32 SAMPLES
AVERAGE 64 SAMPLES
V
STZ1
NO
YES
ASSERT SELF-TEST SIGNAL
WAIT 32 SAMPLES
AVERAGE 64 SAMPLES
V
STP
DEASSERT
SELF-TEST SIGNAL
WAIT 32 SAMPLES
AVERAGE 64 SAMPLES
V
STZ2
OFFSET
MIN
< V
STZ1
< OFFSET
MAX
OFFSET
MIN
< V
STZ2
< OFFSET
MAX
YES
NO
ENTER SELF-TEST CYCLE
CALCULATE
STD = V
STP
– V
STZ1
STD
MIN
< STD < STD
MAX
NO
YES
CALCULATE
STZ = |V
STZ1
– V
STZ2
|
STZ ≤ 4 LSB*
NO
YES
07
54
4-
0
48
Figure 27. First Half Is Joined to Second Half of ST Chain
ENTER PHASE 4
INCREMENT CYCLE COUNT
CYCLE COUNT = 6
NO
YES
SET SELF-TEST FAIL CODE
ENTER ERROR STATE
ENTER SELF-TEST CYCLE
*10-BIT LSB
INCREMENT PASS COUNT
PASS COUNT = 2
NO
YES
0
75
44
-04
9
Figure 28. Internal Self-Test State Machine