Analog Devices ADV8003, Руководство по оборудованию

Страница: 300 / 440

ADV8003 Hardware Manual
Rev. B, August 2013 300
Table 75: CEC Incoming Frame Buffer 2 Registers
Register Name CEC Map
Address Description
cec_buf2_rx_frame_header[7:0] 0x65 Header of message in frame buffer 2
cec_buf2_rx_frame_data0[7:0] 0x66 Byte 0 of message in frame buffer 2
cec_buf2_rx_frame_data1[7:0] 0x67 Byte 1 of message in frame buffer 2
cec_buf2_rx_frame_data2[7:0] 0x68 Byte 2 of message in frame buffer 2
cec_buf2_rx_frame_data3[7:0] 0x69 Byte 3 of message in frame buffer 2
cec_buf2_rx_frame_data4[7:0] 0x6A Byte 4 of message in frame buffer 2
cec_buf2_rx_frame_data5[7:0] 0x6B Byte 5 of message in frame buffer 2
cec_buf2_rx_frame_data6[7:0] 0x6C Byte 6 of message in frame buffer 2
cec_buf2_rx_frame_data7[7:0] 0x6D Byte 7 of message in frame buffer 2
cec_buf2_rx_frame_data8[7:0] 0x6E Byte 8 of message in frame buffer 2
cec_buf2_rx_frame_data9[7:0] 0x6F Byte 9 of message in frame buffer 2
cec_buf2_rx_frame_data10[7:0] 0x70 Byte 10 of message in frame buffer 2
cec_buf2_rx_frame_data11[7:0] 0x71 Byte 11 of message in frame buffer 2
cec_buf2_rx_frame_data12[7:0] 0x72 Byte 12 of message in frame buffer 2
cec_buf2_rx_frame_data13[7:0] 0x73 Byte 13 of message in frame buffer 2
cec_buf2_rx_frame_data14[7:0] 0x74 Byte 14 of message in frame buffer 2
buf2_rx_frame_length[4:0] , TX2 CEC Map, Address 0xF848[4:0] (Read Only)
This signal is used to readback the message size of the CEC message received in frame buffer 2.
7.3.3. CEC Message Reception Overview
This section describes how messages are received and stored when only one frame buffer is enabled (default condition).
1. Initially the receive buffer (buffer 0) is empty.
2. A message is received and stored in receive buffer 0, and buf0_timestamp[1:0] is set to 0b01. If the corresponding interrupt mask
bit is set, cec_rx_ready_int[2:0] goes high and an interrupt is generated to alert the host processor that a message was received.
No more messages can be received until the processor reads out the received message.
3. The host processor responds to the interrupt, or polls the buf0_timestamp[1:0] register and realizes a message was received, and
reads receive buffer 0. Once the message is read the processor clears the cec_rx_ready_int[2:0] interrupt which resets the buffer
0 timestamp to 0b00 and also clears the buffer 0 status bit (if applicable). The CEC module is now ready to receive the next
incoming message.
This section describes how messages are received and stored, how the time stamps are generated, and what happens when the host reads a
received message when all three frame buffers are enabled.
1. Initially all buffers are empty and all time stamps are 0b00.
2. A message is received and stored in receive buffer 0, and buf0_timestamp[1:0] is set to 0b01. If the corresponding interrupt mask
bit is set, cec_rx_ready_int[2:0] goes high and an interrupt is generated to alert the host processor that a message was received.
3. Another message is received and stored in receive buffer 1, and buf1_timestamp[1:0] is set to 0b10. If the corresponding
interrupt mask bit is set, cec_rx_ready_int[2:0] goes high and an interrupt is generated to alert the host processor that a message
was received.
4. The host processor responds to the interrupts, or polls the timestamps and realizes that messages were received, and reads the
time stamps to determine which receive buffer to read first. The buffer with the earliest time stamp should be read first, so in
this example the processor should read receive buffer 0 first. Once the message is read, the processor clears
cec_rx_ready_int[2:0] which resets the buffer 0 timestamp to 0b00 and also clears the buffer 0 status bit (if applicable).
5. Another message is received. The Rx module checks to see which of the three buffers are available, starting with buffer 0. In this
example, buffer 0 was read out already by the host processor and is available so the new message is stored in receive buffer 0. At
this time the timestamp for receive buffer 1 is adjusted to 0b01 to show that it contains the first received message, and a