ADV3221-EVALZ/ADV3222-EVALZ User Guide
UG-844
One
Technology
Way
•
P.O.
Box
9106
•
Norwood,
MA
02062-9106,
U.S.A.
•
Tel:
781.329.4700
•
Fax:
781.461.3113
•
www.analog.com
Evaluation Board for the
800 MHz, 4:1 Analog Multiplexers
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. 0 | Page 1 of 10
FEATURES
Full featured evaluation board for the
Single board with both 50 Ω and 75 Ω termination
±5 V operation
EVALUATION KIT CONTENTS
evaluation board
Instruction guide for user guide download
EQUIPMENT NEEDED
Signal source or video pattern generator and signal analyzer
Power supplies (2 V/100 mA and ±5 V/1 A)
BNC-to-SMA connector for inputs and output using the 50 Ω
terminated board
BNC-to-BNC connector for inputs and output using the 75 Ω
terminated board
GENERAL DESCRIPTION
are high speed, high slew rate,
buffered, 4:1 analog multiplexers. They offer a −3 dB signal
bandwidth greater than 800 MHz and channel switch times of
less than 20 ns with 1% settling. With lower than −58 dB of
crosstalk and −67 dB isolation (at 100 MHz), the
and
are useful in many high speed applications. The
differential gain error of less than 0.02% and differential phase
error of less than 0.02°, together with 0.1 dB gain flatness out to
100 MHz while driving a 75 Ω back terminated load, make the
ideal for all types of signal switching.
include an output buffer that can be
placed into a high impedance state, which allows multiple
outputs to be connected together for cascading stages without
the off channels loading the output bus. The
has a
gain of +1, and the
has a gain of +2; both devices
operate on ±5 V supplies while consuming less than 7.5 mA of
idle current. The channel switching is performed via latched
control lines, allowing synchronous updating in a multiple
environment.
are offered in a 16-lead SOIC package
and are available over the extended industrial temperature range
of −40°C to +85°C.
This user guide provides all of the supporting documentation
for working with the
evaluation board. Additional information is available in the
data sheet, which should be consulted in
conjunction with this user guide when working with the
evaluation board.
EVALUATION BOARD PHOTOGRAPH AND BLOCK DIAGRAM
LATCH
D
Q
LATCH
D
E
CO
DE
D
Q
LATCH
D
Q
LATCH
D
Q
LATCH
D
Q
LATCH
D
Q
IN0
OUT
ENABLE
CS
A0
A1
CK1
CK2
IN1
IN2
IN3
132
42-
0
01
G = +1
(G = +2)
100k
Ω
100k
Ω
Figure 1.