Analog Devices ADPA1107-EVALZ, Руководство пользователя

Страница: 7 / 14

ADPA1107-EVALZ User Guide UG-1962
Rev. 0 | Page 7 of 14
OPERATING THE ADPA1107-EVALZ WITH THE DRAIN BIAS PULSER BOARD
The ADPA1107-EVALZ ships with a drain bias pulser board. A
block diagram of the pulser board is shown in Figure 4. The pulser
board has two primary components. The IRFZ48NSTRLPBF is
an 55 V/64 A, metal-oxide semiconductor field effect transistor
(MOSFET) that switches the drain voltage to the ADPA1107 on and off, and the MIC5021YN is a high-side, MOSFET, static
switch driver that controls the IRFZ48NSTRLPBF MOSFET.
The pulser board plugs into the J3 and J4 headers of ADPA1107-
EVALZ and can be configured to provide a pulsed drain voltage
and a negative gate control voltage to control the biasing of the
ADPA1107.
Table 3. J1 to J5, TP1 to TP4, P1, and P2 Pulser Board Connections to the ADPA1107
Header Header Pin Number Header Pin Name
J1 Not applicable VDD
J2 Not applicable SENSE
J3 Not applicable VG1
J4 Not applicable Pulse
J5 Not applicable PULSED_VDD
VREFBIAS Not applicable VREFBIAS
VREF Not applicable VREF
VDET Not applicable VDET
VDETBIAS Not applicable VDETBIAS
P1 1 VDET
2 VDET_BIAS
3, 5, 7, 9, 10, 11, 12, 13, 14, 15, 17, 19, 21, 22, 23, 24 GND
4, 6, 8 PULSED_VDD
16, 18, 20 VG1
P2 1, 2, 3, 4, 5, 7, 9 ,11, 12, 13, 14, 15, 16, 17, 19, 21 GND
6, 8, 10 VG1
18, 20, 22 PULSED_VDD
23 VREF
24 VREF_BIAS