UG-1098
ADE9000 Technical Reference Manual
Rev. 0 | Page 30 of 86
Dip/Swell Indication
Dip indicates if the voltage went below a specified threshold for a
user configured number of cycles. Conversely, swell indicates if the
voltage went above a threshold for a specified number of cycles.
Set the DIP_LVL register to correspond to the RMS½ value to
trigger the dip event, according to this equation:
DIP_LVL
=
xVRMSONE
× 2
−5
Configure the number of cycles to observe the RMS½ value
over in the DIP_CYC register.
The RMS½ voltages on Phase A, Phase B, and Phase C is
compared to the DIP_LVL over the specified DIP_CYC. If the
RMS½ voltage is low for the specified number of DIP_CYC, the
dip event has occurred on that phase and the corresponding
DIPA, DIPB, and DIPC bits are set in the STATUS1 register.
The dip event can be configured to generate an interrupt on the
IRQ1 pin
The dip event can be configured to generate an event on the
CF4/EVENT/DREADY pin, if the corresponding bits are set in
the EVENT_MASK register. This allows the user to precisely
time the duration of a dip or swell, using the CF4/EVENT/
DREADY pin in combination with a timer on an external
microcontroller.
The minimum RMS½ value measured during the dip is stored
in the corresponding DIPA, DIPB, and DIPC registers.
Similarly, the swell indication has a SWELL_LVL register to set
the swell threshold, according to this equation:
SWELL_LVL
=
xVRMSONE
× 2
−5
There is also a SWELL_CYC register. The maximum RMS½
voltage value measured during the swell is stored in the
corresponding SWELLA, SWELLB, and SWELLC registers.
If the DIP_SWELL_IRQ_MODE bit is set to 0 in the
CONFIG1 register, an interrupt is generated every DIP_CYC/
SWELL_CYC cycles. If DIP_SWELL_IRQ_MODE is set to 1,
one interrupt is generated when dip/swell mode is entered and
another interrupt is generated on exit. The mode is changed
after DIP_CYC cycles. Note that if DIP_CYC/SWELL_CYC = 1,
an extra interrupt is generated on exit of the dip/swell condition,
and the dip/swell value, DIPx/SWELLx, is updated at that time,
which exceeds the DIP_LVL/SWELL_LVL value.
Overcurrent Indication
Overcurrent indication monitors the RMS½ current
measurements. If a RMS½ current is greater than the user
configured OILVL, the overcurrent threshold, this is indicated
in the OI bit in the STATUS1 register.
OILVL
=
xIRMSONE
× 2
−5
The OC_EN[3:0] bits in the CONFIG3 register select which
phases to monitor for overcurrent events.
The OIPHASE[3:0] bits in the OISTATUS register indicate
which current channels had RMS½ measurements greater than
the threshold.
If a phase is enabled, with the corresponding OC_EN bit set
and RMS½ current greater than the threshold, the OI status is
set and the RMS½ value is stored in the corresponding OIx
register. If a phase is disabled, or an overcurrent event does not
occur on that phase, the OIx register keeps the last value.
Peak Detection
records the peak value measured on the current
and voltage channels, from the xI_PCF and xV_PCF waveforms.
The PEAKSEL[2:0] bits in the CONFIG3 register allow the user
to select which phases to monitor. Set PEAKSEL[2] to monitor
Phase C, PEAKSEL[1] for Phase B, and PEAKSEL[0] for Phase A.
Set PEAKSEL[2:0] = 111 (binary) to monitor all three phases.
The IPEAK register stores the peak current value in
IPEAKVAL[23:0] and indicates which phase(s) currents
reached the value in the IPPHASE[2:0] bits. IPEAKVAL is equal
to xI_PCF/2
5
.
IPPHASE[2] indicates that Phase C had the peak value,
IPPHASE[1] indicates Phase B, and IPPHASE[0] indicates
Phase A.
Similarly, VPEAK stores the peak voltage value in
VPEAKVAL[23:0]. VPEAKVAL is equal to xV_PCF/2
5
.
VPPHASE[2] indicates if Phase C had the peak voltage value,
VPPHASE[1] indicates Phase B, and VPPHASE[0] indicates
Phase A.
When the user reads the IPEAK register, its value is reset. The
same is true for reading VPEAK.
Power Factor
The total active power and total apparent power are
accumulated over 1.024 sec. Then, the power factor is calculated
on each phase according to this equation:
sec
024
.
1
sec
024
.
1
over
d
accumulate
AVA
over
d
accumulate
AWATT
APF
=
The sign of the APF calculation follows the sign of AWATT.
To figure out what quadrant the energy is in, look at the sign of
the total or fundamental reactive energy in that phase along
with the sign of the xPF or xWATT value, as indicated in the
data sheet. Quadrant I and Quadrant III have capacitive power
factors, and Quadrant II and Quadrant IV have inductive power
factors. Note that for most applications, the watts are received
(imported) from the grid, and therefore the watt and VAR stay
within Quadrant I and Quadrant IV.
