American Megatrends AMI 386SX, Предварительное руководство, Страница: 32 / 52

8-bit bus, is located in this area. The slow execution of this device driver
makes the video I/O sluggish. The AMI-386SX provides the option of mapping
this space into the 16 bit system board RAM. The EGA/VGA bios can be copied in
the 16-bit RAM and executed from there. This improves the video I/O speed,
since the EGA BIOS can now be accessed through a 16-bit bus. When this is done
then memory address 0C0000 through 0DFFFF cannot be accessed on the 16-bit I/O
slot. Also, any I/O slot 8-bit memory in that space will be automatically
disabled.
DRAM access
In 80386SX, a zero wait-state bus cycle requires two clock cycles. The
required number of clock cycles increases by one with every wait-state
introduced in the access. Most processor accesses are memory read operations.
To speed up the memory reads, the AMI-386SX incorporates a page interleave
scheme. This improves system speed, since a page hits requires no wait states,
whereas a normal memory access would require wait states to be inserted.
Data Access: Cycle times
Table 3.1 gives the wait states and total bus cycle times for different cases
of on-board DRAM access:-