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3.13 Display Identification Interface
Table 3–14 Display Identification Interface
Pin Name Type Description
DDC1CLK/
DDC1DATA
or
AUX1P/N
I/O
DDC1CLK/DDC1DATA and AUX1P/N signal pairs are mutually exclusive.
A design can use either the DDC1 or AUX1 pair on one display connector.
Alternatively, DDC1DATA can be connected to AUX1N, and DDC1CLK
can be connected to AUX1P for use on one DisplayPort connector (see
reference schematics).
Note: Can be unconnected if not used.
For the DDC functionality (DDC data and clock signals (I 2 C master)):
• These pins can be used to support internal high-bandwidth digital
content protection (HDCP).
• Outputs are open drain and 3.3-V tolerant only; NOT 5-V tolerant.
Level shifter from 5 V to 3.3 V is required on the PCB.
For the AUX functionality (auxiliary differential signals for DisplayPort):
• A 100-nF AC-coupling capacitor is required on each differential signal
placed near the connector, and
• A source detection pull-down resistor (100-kΩ 5% tolerance) is
required on the AUXP signal and a pull-up resistor (100-kΩ 5%
tolerance) to 3.3 V is required on the AUXN signal.
DDC2CLK/
DDC2DATA
or
AUX2P/N
I/O
DDC2CLK/DDC2DATA and AUX2P/N signal pairs are mutually exclusive.
A design can use either the DDC2 or AUX2 pair on one display connector.
Alternatively, DDC2DATA can be connected to AUX2N, and DDC2CLK
can be connected to AUX2P for use on one DisplayPort connector (see
reference schematics).
Note: Can be unconnected if not used.
For the DDC functionality (DDC data and clock signals (I 2 C master)):
• These pins can be used to support internal HDCP functionality.
• Outputs are open drain and 3.3-V tolerant only; NOT 5-V tolerant.
Level shifter from 5 V to 3.3 V is required on the PCB.
For the AUX functionality (auxiliary differential signals for DisplayPort):
• A 100-nF AC-coupling capacitor is required on each differential signal
placed near the connector, and
• A source detection pull-down resistor (100-kΩ 5% tolerance) is
required on the AUXP signal and a pull-up resistor (100-kΩ 5%
tolerance) to 3.3 V is required on the AUXN signal.
DDCAUX[6:3]N
DDCAUX[6:3]P
I/O
DDC data/clock for DVI/HDMI or auxiliary differential signals for
DisplayPort.
These pins can be used to support internal HDCP.
Note: Can be unconnected if not used.
For the AUX functionality:
• A 100-nF AC-coupling capacitor is required on each differential signal
placed near the connector, and
• A source detection pull-down resistor (100-kΩ 5% tolerance) is
required on each AUXP signal and a pull-up resistor (100-kΩ 5%
tolerance) to 3.3 V is required on each AUXN signal.
For the I 2 C functionality:
Outputs are open drain and 3.3-V tolerant; NOT 5-V tolerant. Level shifter
from 5 V to 3.3 V is required on the PCB.
HPD1
GENERICC_HPD2
I Hot-plug detect signal from the display device to the GPU.
Signal Descriptions 31
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