AMD ATI CTM, Техническое справочное руководство

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Memory Controller Unit Commands 13
© 2006 Advanced Micro Devices, Inc. ATI CTM Guide v. 1.01
If performance counters are disabled, this command has no effect.
Parameter 0: base address
2.2.2 Memory Controller Unit Commands
This section contains all of the commands for the memory controller unit.
All address values are provided in the same format: a 2K-aligned base format. The lower eleven bits are ignored by
CTM, and the address is treated as if all of the bits were zero. These base addresses are used in the address calculation
of the MC, as described in Section 2.1.4. The base address parameter is:
Similarly, all format parameters are expressed the same way. The format contains the pitch, tiling format, and data
format of the information in memory to which it refers. The pitch is given in multiples of 4 (the lowest two bits of the
pitch must be zero). The pitch, tiling, and data formats are used by the MC to calculate an address offset from an (x,
y) index pair, as described in Section 2.1.4. The format parameter is:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
base address
Bits Field Name Description
10:0 Reserved Reserved
31:11 base address The 2K-aligned address where the performance counter results will be
placed.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
base address
Bits Field Name Description
10:0 Reserved Reserved
31:11 base address The 2K-aligned address.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
format t pitch
Bits Field Name Description
1:0 Reserved Reserved
12:2 pitch The pitch in multiples of 4
15:13 Reserved Reserved
17:16 tiling Tiling format (possible values):
• 0 - LINEAR
• 1 - TILED
• 2 - LINEAR_INP_2X2
• 3 - TILED_INP_2X2