Reference Manual, Cyclone Edition
Nios Development Board
101 Innovation DriveSan Jose, CA 95134(408) 544-7000www.altera.com
Document Version:
1.3
Document Date:
January 2004
Страница 1: ...Reference Manual Cyclone Edition Nios Development Board 101 Innovation Drive San Jose CA 95134 408 544 7000 www altera com Document Version 1 3 Document Date January 2004...
Страница 2: ...s Altera products are protected under numerous U S and foreign patents and pending applications mask work rights and copyrights Altera warrants performance of its semiconductor products to current spe...
Страница 3: ...box Bookmarks serve as an additional table of contents Thumbnail icons which provide miniature previews of each page provide a link to the pages Numerous links shown in green text allow you to jump t...
Страница 4: ...ote 1 You can also contact your local Altera sales office or sales representative Table 2 How to Contact Altera Information Type USA Canada All Other Locations Product literature http www altera com h...
Страница 5: ...pof file Initial Capital Letters Keyboard keys and menu names are shown with initial capital letters Examples Delete key the Options menu Subheading Title References to sections within a document and...
Страница 6: ......
Страница 7: ...Ethernet MAC PHY 19 Expansion Prototype Connector PROTO1 19 Expansion Prototype Connector PROTO2 21 Mictor Connector 23 Serial Port Connectors 25 Dual 7 Segment Display 26 Push Button Switches 26 Ind...
Страница 8: ...vice J5 38 Appendix A Shared Bus Table 39 Appendix B Restore the Factory Configuration 43 Configuring the Cyclone Device 43 Reprogramming the Flash Memory 44 Appendix C Board Ethernet Connection 45 Co...
Страница 9: ...on reset circuitry General Description The Nios Development Board Cyclone Edition provides a hardware platform for developing embedded systems based on Altera Cyclone devices The Nios development boa...
Страница 10: ...er on your host computer For instructions on communicating with your Nios development board via Ethernet see Appendix C Board Ethernet Connection on page 45 f See the Nios Development Kit Cyclone Edit...
Страница 11: ...16 Mbyte SDRAM Cyclone EP1C20 Device JTAG Connector RS 232 50MHz Oscillator Proto 1 Expansion Prototype Header Dual Seven Segment Display 27 8 Mbyte Flash Memory Configuration Controller 5 0 V Regula...
Страница 12: ...overview of important components on the Nios development board see Figure 2 Links to the component manufacturers are included when available A complete set of schematics a physical layout database an...
Страница 13: ...nfiguration controller see Configuration Controller Device EPM7128AE on page 28 f See the Altera Cyclone literature page for Cyclone related documentation at www altera com literature lit cyc html inc...
Страница 14: ...ress and data connections with the SRAM chips and the Ethernet MAC PHY chip For shared bus information see Appendix A Shared Bus Table on page 39 f See www amd com for detailed information about the f...
Страница 15: ...U60 Compact Flash Pin CON3 Compact Flash Function GND 1 GND F18 2 D03 E17 3 D04 D17 4 D05 D18 5 D06 C18 6 D07 H20 7 CE J15 8 A10 D13 9 OE J20 10 A09 H14 11 A08 J14 12 A07 VCC 13 VCC J17 14 A06 J18 15...
Страница 16: ...SDRAM device pins are connected to the Cyclone device seeTable 6 An SDRAM controller peripheral is included with the Nios development kit allowing a Nios processor to view the SDRAM device as a large...
Страница 17: ...7 BA1 23 H1 DQ0 2 M5 DQ1 4 M3 DQ2 5 M7 DQ3 7 N6 DQ4 8 N1 DQ5 10 N2 DQ6 11 N4 DQ7 13 N3 DQ8 74 N5 DQ9 76 N7 DQ10 77 P7 DQ11 79 P2 DQ12 80 P1 DQ13 82 P6 DQ14 83 P5 DQ15 85 P3 DQ16 31 P4 DQ17 33 R1 DQ18...
Страница 18: ...h memory and the Ethernet MAC PHY device For shared bus information see Appendix A Shared Bus Table on page 39 f See www idt com for detailed information about the SRAM devices Ethernet MAC PHY The LA...
Страница 19: ...al function daughter card 1 See the Altera web site for a list of available expansion daughter cards that can be used with the Nios development board at www altera com devkits The expansion prototype...
Страница 20: ...Edition Figure 5 Figure 6 on page 20 and Figure 7 on page 21 show connections from the PROTO1 expansion headers to the Cyclone device Unless otherwise noted labels indicate Cyclone device pin numbers...
Страница 21: ...witches U27 U28 U29 U30 and U31 to protect the Cyclone device from 5 V logic levels These analog switches are permanently enabled A buffered zero skew copy of the on board OSC output from U2 A buffere...
Страница 22: ...on Figure 8 on page 22 Figure 9 on page 22 and Figure 10 on page 23 show connections from the PROTO2 expansion headers to the Cyclone device Unless otherwise noted labels indicate Cyclone device pin n...
Страница 23: ...ock input and clock output Most Mictor connector pins on J25 connect to I O pins on the Cyclone device U60 For systems that do not use the Mictor connector for the Nios OCI debug module any on chip si...
Страница 24: ...I Debug Module Five of the signals connect directly to the JTAG pins on the Cyclone device U60 and also connect directly to the Cyclone device s JTAG connector J24 The JTAG signals have special usage...
Страница 25: ...to RS 232 voltage levels directly The Nios development board provides two serial connectors one labeled Console and the other labeled Debug Many processor systems make use of multiple UART communicati...
Страница 26: ...in out details Figure 16 Dual 7 Segment Display The pre loaded Nios reference design includes parallel input output PIO registers and logic for driving this display Push Button Switches SW0 SW3 are mo...
Страница 27: ...on devices cannot be cascaded The SOPC Builder active serial memory interface component allows microprocessor systems access to serial configuration memory Serial Flash Connector The serial flash conn...
Страница 28: ...ype connector headers PROTO1 PROTO2 Starting Configuration There are four methods to start a configuration sequence The four methods are the following 1 Board power on 2 Pressing the Reset Config butt...
Страница 29: ...the Nios development kit If you have changed the MAX device logic you can restore the factory configuration using this programming file located in the EPM7128_flash_config_ controller folder of the e...
Страница 30: ...to the safe configuration region of the flash memory Altera recommends that users avoid overwriting the safe configuration data If SW9 Force Safe is pressed the configuration controller will ignore th...
Страница 31: ...fe example design Use the standard_32 example design User Hardware Image At power on or when the Reset Config button SW10 is pressed the configuration controller begins reading user configuration data...
Страница 32: ...esign found in the examples directory The configuration controller will stop reading data when the FPGA successfully configures The safe example design is setup to begin executing code from address 0x...
Страница 33: ...tatus LED Indicators LED LED Name Color Description LED3 Loading Green This LED blinks while the MAX configuration controller is actively transferring data from flash memory into the Cyclone FPGA LED4...
Страница 34: ...ess when SW8 is pressed Figure 19 Safe Config Button SW9 Force Safe Pressing Force Safe SW9 commands the configuration controller to re configure the Cyclone device with the factory programmed safe co...
Страница 35: ...y is used only as the power supply for the Cyclone device core VCCint and it is not available on any connector or header Clock Circuitry The Nios development board includes a 50 MHz free running oscil...
Страница 36: ...p pin to the SDRAM U57 1 The 50 MHz oscillator Y2 is socketed and can be changed by the user However the MAX EPM7128AE device configuration control circuit and other Altera reference designs are not g...
Страница 37: ...nnection to Download Cable The Cyclone device s JTAG pins can also be accessed via the Mictor connector J25 The pins of J24 are connected directly to pins on J25 and care must be taken so that signal...
Страница 38: ...J5 connects to the JTAG pins TCK TDI TDO TMS TRST of the MAX device U3 as shown in Figure 24 Altera Quartus II software can perform in system programming ISP to reprogram the MAX device U3 with a new...
Страница 39: ...vices share address and control lines These shared lines are referred to as the Shared Bus Using SOPC Builder designers can interface a Nios processor system to any device connected to the off chip sh...
Страница 40: ...A4 81 FSE_A5 IO B5 A5 18 A3 4 A3 4 A5 82 FSE_A6 IO C2 A6 17 A4 5 A4 5 A6 83 FSE_A7 IO D2 A7 16 A5 18 A5 18 A7 84 FSE_A8 IO D4 A8 10 A6 19 A6 19 A8 85 FSE_A9 IO D1 A9 9 A7 20 A7 20 A9 86 FSE_A10 IO E4...
Страница 41: ...1 73 FSE_D12 IO B8 D12 35 D12 71 FSE_D13 IO A8 D13 36 D13 70 FSE_D14 IO D8 D14 37 D14 69 FSE_D15 IO C8 D15 38 D15 68 FSE_D16 IO B9 D0 7 D16 66 FSE_D17 IO A9 D1 8 D17 65 FSE_D18 IO D9 D2 9 D18 64 FSE_D...
Страница 42: ...E_n 17 ENET_ADS_N Address Strobe IO A14 ADS 37 ENET_AEN Address Enable IO B15 AEN 41 ENET_BE_N0 Byte Enable 0 IO C16 BE0 94 ENET_BE_N1 Byte Enable 1 IO B16 BE1 95 ENET_BE_N2 Byte Enable 2 IO D16 BE2 9...
Страница 43: ...load cable 2 Launch the Quartus II software and open the Programmer window Tools menu 3 Click Add File and select the following configuration file Nios Development Kit install directory examples recov...
Страница 44: ...hell default directory 3 To download the flash file to the GERMS monitor executing on the board type nios run x r p com1 default_board_image_cyclone_1c20 flash This command assumes the you connected t...
Страница 45: ...velopment board and the GERMS monitor f See the Nios Embedded Processor Software Development Reference Manual for information on these topics Connecting the Ethernet Cable The Nios Development Kit inc...
Страница 46: ...with a two line x 16 character LCD text display The web server software displays useful status and progress messages on this display If you wish to use the network features of the board connect the L...
Страница 47: ...oint to Point Connections Your host computer and the development board are the only two devices connected to a very simple one wire network When the board is delivered from the factory it is pre progr...
Страница 48: ...d type the following command at the GERMS prompt xip 137 57 136 165 no spaces 1 The GERMS monitor does not recognize the Backspace key or Delete key If you make a mistake typing press the Escape key t...
Страница 49: ...Ds 33 Cyclone configuration 28 Reset distribution 28 Safe and user configurations 30 Starting configuration 28 Configuration status LEDs Indicators 33 Conventional flash memory usage 30 Cyclone EP1C20...
Страница 50: ...switches 26 pin information 26 R Reference design default 9 restoring 10 Restore factory configuration Configuring the Cyclone device 43 Reprogramming flash memory 44 S Schematics 12 SDRAM device 16...
