10 |
P a g e
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT PRIOR NOTICE. SHOULD YOU HAVE ANY QUESTION, PLEASE FEEL FREE TO CONTACT OUR SALES
REV 1.0.2
Akribis Systems Pte Ltd
Blk 5012 Techplace II #01-05 Ang Mo Kio Avenue 5
Singapore 569876
Tel: +65 6484 3357 Fax: +65 6484 3361
RCB Reg No: 200410879N GST Reg No: 20-0410879-N
Timeout
If the encoder is not yet ready for the next request cycle, it sets “SLO” low during timeout period. The timeout duration
varies with encoder used. Some encoder allowed user to configure the timeout period. The user can configure the
timeout period to minimum to achieve higher request cycle rate
Line Delay
Signals travelling between master and encoder experience significant time delay due to the cable length. The time delay
has no effect at low clock speeds (where the time delay is much shorter than the clock period). However, for high clock
speeds, the line delay will become significant and cause the data transmission to violate the protocol rules.
Due to the ITF-21-BISS-MIT (master) do not support line delay compensation, thus slower clock frequency must be used
for long encoder cable length. The default MA clock frequency used by adapter is 1MHz. With this clock frequency, the
maximum cable length that can be supported without line delay compensation is 20m.
Request Cycle Rate
BiSS C cycle period is the time between the first falling edge of MA clock to rising edge of SLO timeout. This determine
the max request cycle rate.
The BiSS C cycle duration can be calculated from the formula below:
𝑩𝒊𝑺𝑺 𝑪 𝒄𝒚𝒄𝒍𝒆 𝒅𝒖𝒓𝒂𝒕𝒊𝒐𝒏 = (𝟏𝟏. 𝟓 + 𝒏)𝑻 + 𝒂𝒄𝒌 + 𝒕𝒊𝒎𝒆𝒐𝒖𝒕
Where
n= number of bit of position data
T= MA clock period
From the formula above, we can see that BiSS C cycle duration is not fixed but vary with number of bits of position data,
MA clock frequency used, ack duration and timeout duration.
Max Allowable BiSS C Cycle of Adapter [ IMPORTANT! ]
To ensure ITF-21-BISS-MIT function properly, the BiSS C cycle period should not exceed 102
μs
.
Basically, ITF-21-BISS-MIT can support any situation as long as the requirement of Max Allowable of BiSS C Cycle of
ITF-21-BISS-MIT of 102
μs
is adhered.
Calculation Example:
For n=12 bit, BiSS MA Clock Period=1MHz (1
μs
), BiSS SLO ack = 35
μs
, BiSS SLO Timeout=23.5
μs
BiSS C Cycle Period = (11.5 + 12) 1
μs
+ 35
μs
+23.5
μs
= 82
μs
For n=32 bit (worse case than 26 bit), BiSS MA Clock Period=1MHz (1
μs
), BiSS SLO ack = 35
μs
, BiSS SLO
Timeout=23.5
μs
BiSS C Cycle Period = (11.5 + 32) 1
μs
+ 35
μs
+23.5
μs
= 102
μs
(equal to max allowable BiSS C Cycle Period of the adapter)