Aiwa CSD-A190 EZ, Руководство по обслуживанию

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IC DESCRIPTION -1/1 (IC, LC78602HNE-8612D) -1/2
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
Pin
DEFI
SP8
PDO
VVSS
ISET
VVDD
FR
VSS
EFMO
EFMIN
TMOD
CLV
NC1
HFL
TES
TOFF
TGL
JP
NC2
LASER
FSTA
VDD3V
EFBAL
PCK
SLOF
SLED
+
SLED −
PUIN
DOUT
NC3
SEG8
SEG7
SEG6
SEG5
SEG4
SEG3
SEG2
SEG1
VSS
NC4
DIG2
DIG1
PROG
KEYIN
NC5
I/O
I
O
O
−
AI
−
AI
−
O
I
I
O
O
I
I
O
O
O
O
O
O
−
O
O
O
O
O
I
O
−
O
O
O
O
O
O
O
O
−
−
O
O
O
I
O
Function
Defect detection signal (DEF) input. (Must be connected to 0V if unused).
SP8 control output.
Internal VCO control phase comparator output.
Internal VCO ground. This pin must be connected to 0V.
PLL circuit pins PDO output current adjustment resistor connection.
Internal VCO power supply.
VCO frequency range adjustment.
Digital system ground. This pin must be connected to 0V.
Slice level EFM signal output.
Control pins EFM signal input.
Test input. This pin must be connected to 0V.
Disc motor control output. This is a three-state output.
Unused pin. This pin must be left open.
Track detection signal input. This is a Schmitt input.
Tracking error signal input. This is a Schmitt input.
Tracking off output.
Tracking gain switching output. A low level output raises the gain.
Track jump control output. This is a three-state output.
Unused pin. This pin must be left open.
Laser control output.
FSTA control output.
Internal digital circuit power supply.
EFBAL control output.
EFM data playback clock monitor. 4.3218MHz when the phase is locked.
(Note that this output pin is only provided for testing. Mount a external resistor
between VDD5V in order to monitor this signal but connect this pin to the digital
groung in normal mode operation.
Sled off control output.
Sled feed output.
Limit switch detection input. A pull-up resistor is built in.
Digital output(SPDIF).
Unused pin. This pin must be left open.
Segment output (8). A pull-up resistor is built in.
Segment output (7). A pull-up resistor is built in.
Segment output (6). A pull-up resistor is built in.
Segment output (5). A pull-up resistor is built in.
Segment output (4). A pull-up resistor is built in.
Segment output (3). A pull-up resistor is built in.
Segment output (2). A pull-up resistor is built in.
Segment output (1). A pull-up resistor is built in.
Digital system ground. This pin must be connected to 0V.
Unused pin. This pin must be left open.
Common driver output (2). A pull-up resistor is built in.
Common driver output (1). A pull-up resistor is built in.
Program operation monitor. A pull-up resistor is built in.
Key matrix input. A pull-up resistor is built in.
Unused pin. This pin must be connected to 0V.