Operation
Clock Synthesizer 13.5 GHz User Guide
49
The experimental setup is shown in Figure 14. Here the N4963A trigger output
is connected to the scope trigger input. The channel 1 output is connected to
the scope input and is used as a comparison reference. The jittered,
complementary, Channel 2 output is connected to an external, programmable
divider. The output of the divider is then connected to the sampling scope.
Note, the divider must be capable of dividing at the highest clock rate (See the
Agilent Technologies web page for compatible high frequency dividers). The
jittered channel 2 output is connected to a spectrum analyzer.
The added divider allows the measurement of phase deviation in excess of one
half UI. As the clock signal is phase modulated, its transition-edges dither back
and forth about some equilibrium position. On a sampling scope these dithering
transition-edges appear fuzzy or noisy. The ratio of, the time width of this edge
noise to the clock period, is a measure of the phase deviation in UI. As there
are 2 transition-edges per clock period it becomes impossible to measure a
phase deviation of greater than half of a UI on an undivided clock signal. For
deviations greater than half of a UI the signal looks completely noisy on a
scope. Passing the signal through a divider does not change the time deviation
of the divided clock edges, but it does extend the period of the divided signal.
By increasing the divide modulus one can measure increasing numbers of UI.
The maximum number of measurable UI is half the divide modulus (e.g. If the
divide modulus is 4, a maximum of 2 UI can be measured on the scope). To
properly see the signal on the scope, it is important that the N4963A
programmable trigger divide modulus is greater than the modulus of the
external divider.
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