AE Techron 7548, Руководство оператора

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List of Figures
Figure 1.1 – 7548 Front Panel ............................................................................................. 7
Figure 2.1 – Connecting the Load ....................................................................................... 9
Figure 2.2 – Close-up of the Output Terminal Resistor ....................................................... 9
Figure 2.3 – Close-up of SIM card ..................................................................................... 10
Figure 2.4 – Wiring for Unbalanced or Balanced Input Connector .................................... 10
Figure 2.5 – 208V 3-Phase AC Mains Wiring .................................................................... 11
Figure 2.6 – 380/400/415V 3-Phase AC Mains Wiring ...................................................... 11
Figure 3.1 – Front Panel Controls and Display .................................................................. 12
Figure 3.2 – Front Panel Indicators ................................................................................... 13
Figure 3.3 – Main Status Indicators for Stand-Alone Amplifiers ........................................ 13
Figure 3.4 – Fault Status Indicators for Stand-Alone Amplifiers ........................................ 14
Figure 3.5 – Main Status Indicators for Multi-Amplifier Systems ....................................... 15
Figure 3.6 – Fault Status Indicators for Multi-Amplifier Systems ....................................... 16
Figure 3.7 – Back Panel Controls and Connectors ........................................................... 17
Figure 4.1 – Master or Follower Setting ............................................................................ 19
Figure 4.2 – Gain Trim Control .......................................................................................... 19
Figure 4.3 – Controlled-Voltage or Controlled-Current Mode Setting ................................ 19
Figure 4.4 – Compensation Setting ................................................................................... 20
Figure 4.5 – Ready/Run Mode or Standby Mode on Power-Up Setting ............................ 20
Figure 4.6 – Standby Mode on Overload Setting .............................................................. 20
Figure 4.7 – Bi-Level Power Switch Location .................................................................... 21
Figure 5.1 – Remote Status and Control Pinouts .............................................................. 22
Figure 5.2 – Remote Run/Standby Monitor ....................................................................... 22
Figure 5.3 – Remote Status and Reset Schematic ........................................................... 23
Figure 5.4 – Remote Enable/Standby ............................................................................... 24
Figure 5.5 – Remote Current Monitoring ........................................................................... 25
Figure 5.6 – Remote Current Monitoring, Alternate Method .............................................. 25
Figure 5.7 – Input to Output Comparison, Controlled-Voltage Operation .......................... 26
Figure 5.8 – Input to Output Comparison, Controlled-Current Operation .......................... 26
Figure 5.9 – Factory-installed Default RC Network ........................................................... 27
Figure 5.10 – Custom Compensation Location ................................................................. 29
Figure 5.11 – Compensation Effects on Waveform ........................................................... 29
Figure 5.12 – Square Wave Showing a Decrease in R is Required .................................. 29
Figure 5.13 – Square Wave Showing an Increase in R is Required ................................. 29
Figure 5.14 – Square Wave Showing an Increase in C is Required ................................. 29
Figure 7.1 – +Vcc and –Vcc Point Locations ..................................................................... 32
Figure 7.2 – Amplifier cover removed for inspection ......................................................... 32
Figure 7.3 – Fuse F1 Location ........................................................................................... 33
Figure 7.4 – Interlock I/O Connector ................................................................................. 33
Figure 7.5 – +TEMP and -TEMP test point locations ........................................................ 34