ADLINK Technology Q7-BT, Техническое описание

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16 Interfaces
3.1 18/24-Bit LVDS LCD
The LVDS interface is connected to the DDI0 interface of the CPU, while the translations of the
DDI signals are made by a DisplayPort™-to-LVDS converter. The Realtek RTD2136R-CG, Dis-
playPort-to-LVDS converter receives one lane of DisplayPort signals and generates one port of
LVDS output. The interface supports resolutions up to 1920x1200 at 60Hz (for 18-bit color
depth.) The backlight enable, display enable, and PWMOUT functions originate from the BMC
and the CPU and can be controlled from the BIOS setup utility.
3.2 HDMI or Display Port (DP)
The default setup defines the DDI1 port as HDMI (TMDS) or DP and provides the following fea-
tures:
 1 Clock pair

3 Data pairs
 Service signals

HDMI resolutions up to 1920x1200 at 60Hz
 DP resolutions up to 2560x1600 at 60Hz
Select between DisplayPort and HDMI in the Advanced Graphics menu of the BIOS setup utility.
The HDMI interface is compliant with the HDMI 1.4 specification.
3.3 Camera MIPI-CSI
The Q7-BT provides a 40-pin, on-board MIPI-CSI 2.0 (serial) camera connector with two clock
lanes and five data lanes supporting up to 800 Mbit/s of actual pixels.
3.4 Audio (HDA)
The CPU provides an HDA controller, which communicates with internal or external CODECs
over the Intel HDA serial link. HDA signals are brought out through pins 59, 61, 63, 65, 67 on the
Qseven connector.
3.5 PCI Express (PCIe)
The CPU features four PCIe x1 ports, and the Q7-BT module uses three of them for the PCIe
interface and one of them for the Gigabit Ethernet interface. The PCIe interface supports the
PCIe Base Specification 2.0 with a maximum signal rate of 5 GT/s and can be configured to sup-
port PCIe edge cards or Express Cards.
3.6 Gigabit Ethernet
The on-board Intel I210IT Ethernet controller uses PCIe x1 (v2.1) bus signals from the CPU to
enable
10T/100TX/1000T operation through integrated MAC, PHY, and SGMII/SerDes interfaces.
One audio link can be routed through the DDI1
interface and one link can be routed to the audio
CODEC on the base board. Consequently, audio
over DisplayPort/HDMI and the use of an audio
CODEC can be implemented at the same time.
NOTE: