ADLINK Technology AmITX-SL-G, Руководство пользователя

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System Resources
Hex Range Device
4D1 Slave PIC Edge/Level Trigger register
0A00~0AFF Reserved for SIO functions base address (ex: PME /GPIO etc)
CF8-CFB PCI configuration address register (32 bit I/O only)
CF9 Reset Control register (8 bit I/O)
CFC-CFF PCI configuration data register
7.3. Interrupt Request (IRQ) Lines
7.3.1. IRQ Lines PIC Mode
Table 9: IRQ Lines PIC Mode
IRQ# Typical Interupt Resource Connected to Pin Available
0 Counter 0 N/A No
1 Keyboard controller N/A No
2 Cascade interrupt from slave PIC N/A No
3 Serial Port 2 (COM2) IRQ3 via SERIRQ / PIRQ Note (1)
4 Serial Port 1 (COM1) IRQ4 via SERIRQ / PIRQ Note (1)
5 Serial Port 3 (COM3) IRQ5 via SERIRQ / PIRQ Note (1)
6 Generic N/A No
7 Serial Port 4 (COM4) IRQ7 via SERIRQ / PIRQ Note (1)
8 Real-time clock N/A No
9 Generic N/A Note (1)
10 Generic N/A Note (1)
11 Generic N/A Note (1)
12 PS/2 Mouse IRQ12 via SERIRQ / PIRQ Note (1)
13 Math Processor N/A Note (1)
14 Serial IO GPIO HOST IRQ14 via SERIRQ / PIRQ Note (1)
Note (1): These IRQs can be used for PCI devices when onboard device is disabled.