Acromag ACPS3310 Скачать руководство пользователя страница 19

AcroPack Series ACPS3310 

CompactPCI-Serial Carrier Board 

- 19 - 

Figure 3 ACPS3310 AcroPack Carrier Block Diagram 

PCIe Switch 

The PCIe switch is a 6 port 8 lane PCIe Gen 2 switch. It expands the single host 
PCIe port to two ports, one for each AcroPack site. The host port consists of 
four PCIe lanes or one PCIe lane (depending on CPCI-S slot), each of the 
AcroPack sites have one lane each. 

Important Note:

 The ACPS3310 board is not hot-swappable. 

DC/DC Converter 

The ACPS3310 has four DC/DC converters to provide the power supply 
voltages to the AcroPack modules that are not present on the CPCI-S 
backplane. The +3.3 Volt, +5 Volt and -12 Volt supplies are sourced from +12 
Volt power. The +1.5 Volt supply is sourced from the +3.3 Volt supply. Also, if 
the regulator is populated, +5V standby from the backplane will be converted 
to +3.3V Aux. This part is not populated by default. 

Slot Addressing 

The ACPS3310 carrier unique slot address is dependent upon the geographical 
addressing signals (GA0-GA3) from the backplane. The slot address is 5 bits 
long and consists of 1 bit to identify the site on the carrier where the 
AcroPack modules is installed and 4 bits that are determined by the GA 
signals. The CPLD will serialize the slot address and transmit the address to 
the AcroPack module as requested by the AcroPack module. The process of 
reading the slot address is typically initiated by host software. 

JTAG 

A JTAG interface is provided for programming and debugging FPGAs on 
AcroPack modules. It is intended to be used with a Xilinx Platform USB II 
programming device. A bypass circuit is included that will detect a vacant 
AcroPack site and close a switch to complete the JTAG chain. When two 
AcroPack modules with Xilinx FPGAs are installed on the carrier the module in 
slot B appears first in the chain followed by the module in slot A. The slot 
address CPLD is also included in the JTAG chain for factory programming. 

Power Supply Fuses 

The power supplies to each AcroPack module are individually fused. A blown 

fuse can be identified by visible inspection or by use of an ohm meter. The 

Содержание ACPS3310

Страница 1: ...rd USER S MANUAL ACROMAG INCORPORATED 30765 South Wixom Road Wixom MI 48393 2417 U S A Tel 248 295 0310 Email solutions acromag com Copyright 2019 Acromag Inc Printed in the USA Data and specification...

Страница 2: ...6 Software Support 6 Windows 6 VxWorks 6 Linux 6 2 PREPARATION FOR USE 7 UNPACKING AND INSPECTION 7 BOARD CONFIGURATION 7 Power and Cooling Considerations 8 Carrier Fuses 9 Isolation Considerations 9...

Страница 3: ...E PROCEDURE 19 WHERE TO GET HELP 19 5 SPECIFICATIONS 20 PHYSICAL 20 Physical Configuration 20 Connectors 20 Isolation 20 Isolated Power 21 Power 21 Fuses 21 CPCI S COMPLIANCE 21 ENVIRONMENTAL 21 EMC C...

Страница 4: ...marks registered trademarks trade names and service marks are the property of their respective owners Radio Frequency Interference Statement This is a Class A product In a domestic environment this pr...

Страница 5: ...ides the capability to distinguish a particular carrier and AcroPack module from others when multiple instances of the same carrier and or module are used in a system JTAG Programming Header A standar...

Страница 6: ...gh level interface to boards eliminating the need to perform low level reads writes of registers and the writing of interrupt handlers VxWorks Acromag provides a software product sold separately consi...

Страница 7: ...s packaging Be aware that failure to comply with these guidelines will void the Acromag Limited Warranty UNPACKING AND INSPECTION Upon receipt of this product inspect the shipping carton for evidence...

Страница 8: ...rature rise above the maximum operating temperature The lack of air circulation within some CPCI S chassis could be a cause for some concern The dense packing of the AcroPack modules to the carrier bo...

Страница 9: ...WARNING This AcroPack carrier is designed to provide isolation between the AcroPack Field I O signals and the host The AcroPack module must also be an isolated AcroPack module to maintain the isolatio...

Страница 10: ...against the back of the carrier connector position the module such that the field I O connector is just above the mating connector Verify that the two connectors are properly aligned Once alignment is...

Страница 11: ...Pack module AcroPack Field I O Connectors The field side connector of AcroPack modules mate to Samtec SS5 50 3 00 L D K TR socket connectors on the carrier board This provides excellent connection int...

Страница 12: ...served isolation 27 27 Reserved isolation 8 30 30 Field I O 15 42 29 29 Field I O 16 32 32 Reserved isolation 31 31 Reserved isolation 9 34 34 Field I O 17 43 33 33 Field I O 18 36 36 Reserved isolati...

Страница 13: ...1 61 Field I O 32 64 64 Reserved isolation 63 63 Reserved isolation 17 66 66 Field I O 33 51 65 65 Field I O 34 68 68 Reserved isolation 67 67 Reserved isolation 18 70 70 Field I O 35 52 69 69 Field I...

Страница 14: ...4 94 Field I O 47 58 93 93 Field I O 48 96 96 Reserved isolation 95 95 Reserved isolation 25 98 98 Field I O 49 59 97 97 Field I O 50 100 100 Reserved isolation 99 99 Reserved isolation Mini PCIe Conn...

Страница 15: ...LED_WPAN LED_WLAN LED_WWAN W_DISABLE COEX1 COEX2 UIM_C4 UIM_C8 UIM_VPP UIM_RESET UIM_CLK UIM_DATA UIM_PWR 2 TDI is tied to TDO on modules that do not use JTAG 3 5 12 and 12 Volt power supplies have be...

Страница 16: ...GND 02 GND reserved reserved 03 1_USB3_Rx 1_USB3_Rx GA1 04 GND PE_CLKIN PE_CLKIN 05 1_PE_Rx00 1_PE_Rx00 GND 06 GND 1_PE_Rx02 1_PE_Rx02 G H I 01 12V 12V GND 02 GND RST WAKE_OUT 03 SATA_SDI SATA_SDO GA...

Страница 17: ...alent The pin assignment for P9 is shown in Table 5 A bypass circuit is included that will detect a vacant AcroPack site and close a switch to bypass the TDI and TDO signals A CPLD on the carrier is i...

Страница 18: ...TCK pin on all target ISP devices sharing the same data stream TDO JTAG Test Data Out This pin is the serial data stream received from the TDO pin on the last device in a JTAG chain TDI JTAG Test Data...

Страница 19: ...n the geographical addressing signals GA0 GA3 from the backplane The slot address is 5 bits long and consists of 1 bit to identify the site on the carrier where the AcroPack modules is installed and 4...

Страница 20: ...MT repair and service tools are used Further Acromag has automated test equipment that thoroughly checks the performance of each board Please refer to Acromag s Service Policy Bulletin or contact Acro...

Страница 21: ...00 mm Board thickness 0 063 inches 1 60 mm Max component height 0 402 inches 10 21 mm Max component height under AcroPack modules 0 0789 inches 2 00 mm Weight 5 57 oz 158 g Connectors P1 CPCI S 72 pin...

Страница 22: ...D1212A XP Power JCE Series 6 Watt 12 VDC 250mA JCE0612D12 TRACO POWER TEN 6N Series 6 Watt 12 VDC 250mA TEN 6 1222N Power Board power requirements are a function of the installed AcroPack modules This...

Страница 23: ...per IEC 61000 4 6 Emissions per EN61000 6 4 Enclosure Port per CISPR 16 Low Voltage AC Mains Port per CISPR 16 Note This is a Class A product Vibration and Shock Standard The ACPS3310 is designed to p...

Страница 24: ...tents are lost when power is removed Yes No Non Volatile Memory Does this product contain Non Volatile memory i e Memory of whose contents is retained when power is removed Yes No Type EEPROM FLASH et...

Страница 25: ...tPCI Serial Carrier Board 25 7 REVISION HISTORY The following table shows the revision history for this document Release Date Version EGR DOC Description of Revision 26 JUL 2018 ENZ Preliminary releas...

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