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Calculation
Idiff and Ibias
Calculation
instantaneous
Idiff
Start and
trip logic
TRIP
Signals
START
Signals
BLOCK
Signals
Intern/
extern
Fault
Phasors IL1N, IL2N,IL3N
Phasors IL1T, IL2T,IL3T
Samples IL1N, IL2N,IL3N
Samples IAT, IBT,ICT
Magnitude
Idiff and Ibias
Samples Idiff
Diff.prot.
characteristic
Hamonic
analysis: DC,
2nd and 5th
Start
phase
selective
Phasor IL1N (neg.seq.)
Phasor IL1T (neg.seq.)
Internal/
External Fault
Discriminator
and Sensitive
differential
protection
Calculation
negative
sequence
Idiff
Harm.
Block
Analog
Outputs
INTFAULT
EXTFAULT
OPENCT
OPENCTAL
en06000434-2.vsd
The sensitive protection is deactivated
above bias current > 150 % rated
current.
IEC06000434 V3 EN
Figure 56:
Principle design of the generator differential protection
Simplified logic diagrams of the function is shown in figures below.
1MRK 502 048-UEN A
Section 6
Differential protection
135
Technical manual
Содержание REG650 ANSI
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