Publication No. 500-9300527837-000 Rev. A.0
Functional Description 37
5.2.3 Flash Hard Drive
One SATA port from the PCH (port 5) is connected to a Silicon Motion SM631
series SATA SSD. This device integrates a Single Level Cell (SLC) NAND array
and a controller with a SATA Gen2 interface. The controller uses ECC and wear-
leveling to provide a robust storage area. An LED (DS408) shows device activity;
see the
section.
LINK
For more details on the SSD, see
http://www.siliconmotion.com
.
Overall drive capacity is dictated by available technology. Currently, the SBC347A
can support up to 32 GBytes of NAND Flash.
Hardware write protection is implemented by bits in the
which is controlled by a BIOS setup screen. Software can read the write protection
status, along with the SSD presence, from the FPGA. The FPGA also provides a
Fast Erase facility. See relevant software documentation for information on how to
activate this function.
5.2.4 NVRAM
A 512 KByte Cypress FM22LD16 Ferro-electric Random Access Memory (FRAM)
device provides memory mapped nonvolatile memory on the SBC347A. This
device is write-protected by bits in the EEPROM DIP switch, which can be
accessed through the BIOS setup menus. Write protection is also set by the
backplane NVMRO signal (on the
pin A4) - if either signal is active,
the NVRAM is write protected.
Access to the devices is through 64 KByte pages mapped into LPC memory space.
The addresses of the pages within the devices are set by the appropriate NVRAM
page register.
TIP
Only access this device using proprietary driver software.
The devices have very high read/write endurance (10
14
cycles) and stated data
retention is greater than 10 years.
LINK
For more details on the FRAM, see
.