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CPCI Bridges 23006-920 & -922     

User Guide 

 

 

Schroff GmbH, Aug. 2008; Document#: 73972-082, Rev.001 

Page 1 of 2 

www.schroff.de 

 

 

Assembly Instructions & General Information  
 

1. 

Mechanical Mounting:

 Please make sure that both backplanes are only attached to the horizontal rails, 

but not fixed. 

The mounting screws of the backplane are not to be tightened until the bridge is 

plugged and fully seated!

 

 

2. 

Power Supply of Backplanes:

 Both backplanes connected by the bridge are to be powered individually. 

The bridge is not to be used for bridging power.  
The bridge does not isolate the power rails of both backplanes.  
GND is connected by a sufficient number of pins in the connector to ensure signal integrity and a common 
GND potential on both backplanes. 
 

3. 

VI/O:

 There is no need to choose the VI/O voltage for the bridge. The bridge automatically takes the VI/O 

voltage of the primary and secondary side.  
Both backplanes can be set to different VI/O voltages, e.g. +5V on the primary side and 3,3V on the 
secondary side. 
 

4. 

M66MHz Operation:

 The 64-bit Bridge 23006-922 is capable of 33 and 66 MHz Operation, the 32-bit 

Bridge 23006-920 is capable of 33MHz Operation.  
  

 

Primary CPCI

Backplane 

Secondary CPCI

Backplane 

PCI  to  PCI 

Bridge 

 

32Bit 

Intel 21150 

compatible 

 

64Bit:  

Intel 21154 

compatible 

7407 

0 Ohm 

PCI to PCI Brigde for 

CompactPCI

 Backplanes 

 
 

Block wiring diagram  

JTAG Signals 

(TRST, TCK, TMS, TDO, TDI) 

IPMB 

(SDA, SCL, PWR) 

Arbitration 

(1 Pair)

 

(REQn#  /GNTn#) 

PCI Clock 

(1x)

 

(CLKn) 

PCI Bus 32 / 64Bit 

(AD[nn]) 

Interrupts 

(X= A...D)

 

(INTX) 

CPCI Signals 

C/BE[n]; DEVSEL; FRAME; IDSEL; 
IRDY; LOCK; M66EN; PAR; REQ64, 
ACK64 
RST; STOP; TRDY 

Bussed Reserved Signals 

BRSVP1A5, BRSVP1B5 

legacy Interrupts 

(INTS, INTP) 

zero Ohm bridges assembled by default and can be removed/omitted optionally 

0 Ohm 

0 Ohm 

0 Ohm 

JTAG Signals 

(TRST, TCK, TMS, TDO, TDI) 

IPMB 

(SDA, SCL, PWR) 

Arbitration 

(7 Pairs)

(REQn#  /GNTn#) 

PCI Clock 

(7x)

 

(CLKn) 

PCI Bus 32 / 64Bit

(AD[nn]) 

Interrupts 

(X= A...D)

(INTX) 

CPCI Signals 

C/BE[n]; DEVSEL; FRAME; IDSEL; 
IRDY; LOCK; M66EN; PAR; REQ64, 
ACK64 
RST; STOP; TRDY 

Bussed Reserved Signals

BRSVP1A5, BRSVP1B5 

legacy Interrupts

(INTS, INTP) 

 

 
 

 

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