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1450A/02-AH Manual

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Copyright 2003 Novatech Instruments, Inc.

10/5/2005

MODEL 1450A/02-AH Synthesizer

NOTE:

This is a preliminary manual for the Novatech Instruments, Inc. Model 1450A/02-AH 

Synthesizer.

WARNING:

Live line voltages are exposed internal to the instrument. Do not operate with covers 

removed. Disconnect power cord before opening instrument for any reason.

Specifications:

OUTPUTS: There are up to nine DDS8p synthesizers internal to the 1450A/02-AH. The output 
frequency range of each is 10kHz to 120MHz, ACMOS, in 1

µ

Hz steps per LSB on the parallel 

interface. Outputs are SMA female on rear panel, 50

Ω.

 See below for operating modes.

INPUT: External Clock, 10MHz 

±

5ppm, >1Vrms, 50

Ω.

 Circuitry detects, locks to and tracks this 

input when present. An internal TCXO (10MHz 

±

2ppm) is used if the 10MHz external clock input is 

left unconnected. SMA Female.

PHASE and FREQUENCY CONTROL: The Parallel interface is on a 90-pin EDAC 516-series 
connector receptacle on the rear panel. An adapter board for use with ribbon cables is available. See 
below for connector details.

SIZE: 19inch 2U rackmount case with mounting ears, 16inches deep, not including connectors.

POWER: 120/240VAC, 50/60Hz, <75VA.

ENVIRONMENTAL: Intended for laboratory/central office environment of: +5

o

C to +40

o

C with 

humidity 80% to 31

o

C, decreasing linearly to 50% at 40

o

C.

OPERATION: Illuminated front panel power switch. Rear panel mode select switch. Front panel 
“IN LOCK” and “POWER OK” LEDs.

Installation Notes:

The 1450A/02-AH contains up to nine independent synthesizers addressable through the various 
control signals on the parallel interface connector.

Summary of Contents for 1450A/02-AH

Page 1: ...locks to and tracks this input when present An internal TCXO 10MHz 2ppm is used if the 10MHz external clock input is left unconnected SMA Female PHASE and FREQUENCY CONTROL The Parallel interface is...

Page 2: ...Y RESERVED F FB5 AR FB35 BZ RESERVED H FB6 AS FB36 CA RESERVED J FB7 AT FB37 CB RESERVED K FB8 AU FB38 CC RESERVED L FB9 AV FB39 CD RESERVED M FB10 AW FB40 CE RESERVED N FB11 AX FB41 CF RESERVED P FB1...

Page 3: ...r your control signals depending upon your cabling The exact value will be determined by your application Reserved pins must be left unconnected except as noted here Three control pins are available R...

Page 4: ...letion of the loading process a new frequency is available at the output The on board circuitry takes approximately 170ns to set the new frequency after BUSY has returned LOW The timing of BUSY return...

Page 5: ...approximately 500msec to Table 1 Timing Independent Mode Parameter Name Min Max Notes Tsu Binary Data Setup 25ns Binary Data Stable before PFn Tld PF Pulse Width Low 100ns Minimum PF pulse width Tb B...

Page 6: ...s propagation delays is greater than this and must be taken into account in the customer application PFR with PB0 through PB13 set to zero phase and FB0 through FB47 set to the desired frequency must...

Page 7: ...e to account for capacitive loading on this signal Please refer to the timing diagram and table below for the details of setting frequency and phase on the parallel interface in the synchronous mode M...

Page 8: ...accounted for and calibrated out by the user application This dispersion will vary with frequency Note that equal lengths of ordinary coaxial cable will have dispersion characteristics much greater t...

Page 9: ...of the EDAC interface connector is in the upper left corner of the connector The connector without pins inserted is shown below I F Connector MOTHER BOARD DATA EXT 10MHz CLK SEL CLK GEN 10MHz INT 1 2...

Page 10: ...vent shall seller be liable for collateral or consequential damages Some states do not allow limitations or exclusion of consequential damages so this limitation may not apply to you All instruments m...

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