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©

 2008 Microchip Technology Inc.

DS22088B-page 1

MCP3422/3/4

Features

• 18-bit 

ΔΣ

 

ADC with Differential Inputs:

- 2 channels: MCP3422 and MCP3423

- 4 channels: MCP3424 

• Differential Input Full-Scale Range: -V

REF

 to 

+V

REF

• Self Calibration of Internal Offset and Gain per 

Each Conversion

• On-Board Voltage Reference (V

REF

):

- Accuracy: 2.048V ± 0.05%

- Drift: 15 ppm/°C

• On-Board Programmable Gain Amplifier (PGA):

- Gains of 1,2, 4 or 8 

• INL: 10 ppm of Full-Scale Range

• Programmable Data Rate Options:

- 3.75 SPS (18 bits)

- 15 SPS (16 bits)

- 60 SPS (14 bits)

- 240 SPS (12 bits)

• One-Shot or Continuous Conversion Options

• Low Current Consumption: 

- 135 µA typical 

(V

DD

= 3V, Continuous Conversion)

- 36 µA typical

(V

DD

= 3V, One-Shot Conversion with 1 SPS)

• On-Board Oscillator

• I

2

C

 Interface: 

- Standard, Fast and High Speed Modes

- User configurable two external address pins 

for MCP3423 and MCP3424

• Single Supply Operation: 2.7V to 5.5V

• Extended Temperature Range: -40°C to +125°C

Typical Applications

• Portable Instrumentation and Consumer Goods

• Temperature Sensing with RTD, Thermistor, and 

Thermocouple

• Bridge Sensing for Pressure, Strain, and Force

• Weigh Scales

• Battery Fuel Gauges

• Factory Automation Equipment

Description

The MCP3422, MCP3423 and MCP3424 devices
(MCP3422/3/4) are the low noise and high accuracy
18-Bit delta-sigma analog-to-digital (

ΔΣ

 A/D) converter

family members of the MCP342X series from Microchip
Technology Inc. These devices can convert analog
inputs to digital codes with up to 18 bits of resolution.

The on-board 2.048V reference voltage enables an
input range of 

±

 2.048V differentially (full-scale

range = 4.096V/PGA).

These devices can output analog-to-digital conversion
results at rates of 3.75, 15, 60, or 240 samples per
second depending on the user controllable configura-
tion bit settings using the two-wire I

2

C serial interface.

During each conversion, the device calibrates offset
and gain errors automatically. This provides accurate
conversion results from conversion to conversion over
variations in temperature and power supply fluctuation. 

The user can select the PGA gain of x1, x2, x4, or x8
before the analog-to-digital conversion takes place.
This allows the MCP3422/3/4 devices to convert a very
weak input signal with high resolution.

The MCP3422/3/4 devices have two conversion
modes: (a) One-Shot Conversion mode and (b) Contin-
uous Conversion mode. In One-Shot conversion mode,
the device performs a single conversion and enters a
low current standby mode automatically until it receives
another conversion command. This reduces current
consumption greatly during idle periods. In Continuous
conversion mode, the conversion takes place
continuously at the set conversion speed. The device
updates its output buffer with the most recent
conversion data. 

The devices operate from a single 2.7V to 5.5V power
supply and have a two-wire I

2

C compatible serial inter-

face for a standard (100 kHz), fast (400 kHz), or
high-speed (3.4 MHz) mode.

The I

2

C address bits for the MCP3423 and MCP3424

are selected by using two external I

2

C address selec-

tion pins (Adr0 and Adr1). The user can configure the
device to one of eight available addresses by connect-
ing these two address selection pins to V

DD

, V

SS

 or

float. The I

2

C address bits of the MCP3422 are pro-

grammed at the factory during production. 

18-Bit, Multi-Channel 

ΔΣ

 Analog-to-Digital Converter with 

I

2

C™ Interface and On-Board Reference

Summary of Contents for MCP3422

Page 1: ... These devices can output analog to digital conversion results at rates of 3 75 15 60 or 240 samples per second depending on the user controllable configura tion bit settings using the two wire I2 C serial interface During each conversion the device calibrates offset and gain errors automatically This provides accurate conversion results from conversion to conversion over variations in temperature...

Page 2: ...ilable in 14 pin SOIC and TSSOP packages Package Types Functional Block Diagram 4 5 6 9 CH2 VSS CH3 Adr1 Adr0 3 12 CH2 CH3 2 13 CH1 CH4 1 14 CH1 CH4 7 8 SDA SCL VDD MCP3424 11 10 SOIC TSSOP 2 3 4 7 8 9 CH1 VDD SDA Adr0 VSS SCL 1 10 CH1 Adr1 5 6 CH2 CH2 MCP3423 2 3 4 5 6 7 CH1 VDD SDA CH2 VSS SCL 1 8 CH1 CH2 MCP3422 MSOP SOIC MSOP MCP3422 2x3 DFN VDD CH1 SDA CH2 VSS 1 2 3 4 8 7 6 5 SCL CH2 CH1 Incl...

Page 3: ...DD CH1 CH1 PGA SCL SDA MUX I2 C Interface Gain 1 2 4 or 8 Adr1 Adr0 CH2 CH2 Voltage Reference Clock 2 048V VREF ΔΣ ADC Converter Oscillator MCP3423 VSS VDD CH1 CH1 PGA SCL SDA MUX I2C Interface Gain 1 2 4 or 8 Adr1 Adr0 CH2 CH2 CH3 CH3 CH4 CH4 Voltage Reference Clock 2 048V VREF ΔΣ ADC Converter Oscillator MCP3424 ...

Page 4: ...MCP3422 3 4 DS22088B page 4 2008 Microchip Technology Inc NOTES ...

Page 5: ...SS 0 3 VDD 0 3 V Note 1 Differential Input Impedance ZIND f 2 25 PGA MΩ During normal mode operation Note 2 Common Mode input Impedance ZINC f 25 MΩ PGA 1 2 4 8 System Performance Resolution and No Missing Codes Effective Number of Bits Note 3 12 Bits DR 240 SPS 14 Bits DR 60 SPS 16 Bits DR 15 SPS 18 Bits DR 3 75 SPS Data Rate Note 4 DR 176 240 328 SPS 12 bits mode 44 60 82 SPS 14 bits mode 11 15 ...

Page 6: ...and Adr1 Pins Addr_High 0 75VDD VDD V The device reads logic high Adr0 and Adr1 Pins Addr_Float 0 35VDD 0 6VDD V Read pin voltage if voltage is applied to the address pin Note 9 VDD 2 Device outputs float output voltage VDD 2 on the address pin if left floating Note 10 Pin Capacitance and I2C Bus Capacitance Pin capacitance CPIN 4 10 pF I2 C Bus Capacitance Cb 400 pF ELECTRICAL CHARACTERISTICS CON...

Page 7: ...ges Specified Temperature Range TA 40 85 C Operating Temperature Range TA 40 125 C Storage Temperature Range TA 65 150 C Thermal Package Resistances Thermal Resistance 8L DFN 2x3 θJA 84 5 C W Thermal Resistance 8L MSOP θJA 211 C W Thermal Resistance 8L SOIC θJA 149 5 C W Thermal Resistance 10L DFN 3x3 θJA 57 C W Thermal Resistance 10L MSOP θJA 202 C W Thermal Resistance 14L SOIC θJA 120 C W Therma...

Page 8: ...MCP3422 3 4 DS22088B page 8 2008 Microchip Technology Inc NOTES ...

Page 9: ...ay be outside the specified operating range e g outside specified power supply range and therefore outside the warranted range 0 0 0005 0 001 0 0015 0 002 0 0025 0 003 0 0035 2 5 3 3 5 4 4 5 5 5 5 VDD V Integral Non Linearity of FSR PGA 8 PGA 4 PGA 1 PGA 2 TA 25 C 0 0 0005 0 001 0 0015 0 002 0 0025 0 003 0 0035 60 40 20 0 20 40 60 80 100 120 140 Temperature o C Integral Non Linearity of FSR 2 7V 5...

Page 10: ... 20 0 20 40 60 80 100 120 140 Temperature C I DDA µA VDD 5 5V VDD 5 0V VDD 2 7V 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 9 1 60 40 20 0 20 40 60 80 100 120 140 Temperature C I DDS µA VDD 2 7V VDD 5 0V VDD 5 5V 0 2 4 6 8 10 12 14 60 40 20 0 20 40 60 80 100 120 140 Temperature C I DDB µA VDD 5 5V VDD 5 0V VDD 4 5V VDD 2 7V 2 1 0 1 2 3 60 40 20 0 20 40 60 80 100 120 140 Temperature C Oscillator Drift Data...

Page 11: ...requency noise presented in application circuit board An additional 10 µF capacitor tantalum in parallel is also recommended to further attenuate current spike noises The supply voltage VDD must be maintained in the 2 7V to 5 5V range for specified operation VSS is the ground pin and the current return path of the device The user must connect the VSS pin to a ground plane through a low impedance c...

Page 12: ...is an open drain N channel driver Therefore it needs a pull up resistor from the VDD line to the SDA pin Except for start and stop conditions the data on the SDA pin must be stable during the high period of the clock The high or low state of the SDA pin can only change when the clock signal on the SCL pin is low Refer to Section 5 3 I2 C Serial Communications for more details of I2 C Serial Interf...

Page 13: ...hysteresis and a timer to give a high degree of immunity to potential ripples and noises on the power supply A 0 1 µF decoupling capacitor should be mounted as close as possible to the VDD pin for additional transient immunity The threshold voltage is set at 2 2V with a tolerance of approximately 5 If the supply voltage falls below this threshold the device will be held in a reset condition The ty...

Page 14: ... typical differential input impedance during a nor mal mode operation is given by Since the sampling capacitor is only switching to the input pins during a conversion process the above input impedance is only valid during conversion periods In a low power standby mode the above impedance is not presented at the input pins Therefore only a leakage current due to ESD diode is presented at the input ...

Page 15: ...e 4 3 shows an example of minimum and maximum output codes for each conver sion rate option The number of output code is given by EQUATION 4 2 The LSB of the data conversion is given by EQUATION 4 3 Table 4 1 shows the LSB size of each conversion rate setting The measured unknown input voltage is obtained by multiplying the output codes with LSB See the following section for the input voltage calc...

Page 16: ...ere LSB See Table 4 1 2 s complement 1 s complement 1 Input Voltage Output Code LSB PGA Input Voltage 2 s complement of Output Code LSB PGA Input Voltage CHn CHn PGA Digital Output Code MSB Example of Converting Output Codes to Input Voltage VREF 011111111111111111 0 216 215 214 213 212 211 210 29 28 27 26 25 24 23 22 21 20 x LSB 15 625μV PGA 2 048 V for PGA 1 VREF 1 LSB 011111111111111111 0 216 2...

Page 17: ...he conversion result is not updated since the last reading A new conversion is under processing and the RDY bit will be cleared when the new conversion result is ready 5 1 2 ONE SHOT CONVERSION MODE O C BIT 0 Once the One Shot Conversion single conversion Mode is selected the device performs only one conver sion updates the output data register clears the data ready flag RDY 0 and then enters a lo...

Page 18: ...n updated with a latest conversion result In One Shot Conversion mode writing this bit to 1 initiates a new conversion Reading RDY bit with the read command 1 Output register has not been updated 0 Output register has been updated with the latest conversion result Writing RDY bit with the write command Continuous Conversion mode No effect One Shot Conversion mode 1 Initiate a new conversion 0 No e...

Page 19: ...t byte after the START bit is always the address byte of the device which includes the device code 4 bits address bits 3 bits and R W bit The device code for the devices is 1101 which is programmed at the factory The I2 C address bits A2 A1 A0 bits for the MCP3423 and MCP3424 are user configurable and determined by the logic status of the two external address selection pins on the user s applicati...

Page 20: ...s while the power supply is ramping up This might cause inaccurate address pin detection When the address pin is left floating When the address pin is left floating the address pin momentarily outputs a short pulse with an amplitude of about VDD 2 during the latch event The device also latches this pin voltage at the same time If the floating pin is connected to a large parasitic capacitance 20 pF...

Page 21: ...ns A2 A1 A0 Adr0 Pin Adr1 Pin 0 0 0 0 Addr_Low 0 Addr_Low 0 0 1 0 Addr_Low Float 0 1 0 0 Addr_Low 1 Addr_High 1 0 0 1 Addr_High 0 Addr_Low 1 0 1 1 Addr_High Float 1 1 0 1 Addr_High 1 Addr_High 0 1 1 Float 0 Addr_Low 1 1 1 Float 1 Addr_High 0 0 0 Float Float Note 1 Float a Leave pin without connecting to anything left floating or b apply Addr_Float voltage 2 The user can tie the pins to VSS or VDD ...

Page 22: ...epeated MSB bits and can be ignored The 5th bit D11 of the byte represents the MSB sign bit of the conversion data Table 5 3 summarizes the conversion data output of each conversion mode The configuration byte follows the output data bytes The device repeatedly outputs the configuration byte only if the Master sends clocks repeatedly after the data bytes The device terminates the current outputs w...

Page 23: ...0 D 9 D 8 D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 C 1 C 0 S 1 S 0 G 1 G 0 1st Byte MCP3422 3 4 Address Byte 3rd Byte Middle Data Byte 4th Byte Lower Data Byte 5th Byte Configuration Byte Optional C 1 C 0 S 1 S 0 G 1 G 0 NAK by Master Stop Bit by Master Optional Nth Repeated Byte Configuration Byte Note MCP3422 3 4 device code is 1101 See Figure 5 1 for details in Address Byte Stop bit or NAK bit can be is...

Page 24: ...te Lower Data Byte 4th Byte Configuration Byte Optional C 1 C 0 S 1 S 0 G 1 G 0 NAK by Master Stop Bit by Master Optional Nth Repeated Byte Configuration Byte Note MCP3422 3 4 device code is 1101 See Figure 5 1 for details in Address Byte Stop bit or NAK bit can be issued any time during reading In 14 bit mode D15 and D14 are repeated MSB and can be ignored In 12 bit mode D15 D12 are repeated MSB ...

Page 25: ... XXX bits are unique to the High Speed HS mode Master This byte is referred to as the High Speed HS Master Mode Code HSMMC The MCP3422 3 4 devices do not acknowledge this byte However upon receiving this code the device switches on its HS mode filters and communicates up to 3 4 MHz on SDA and SCL bus lines The device will switch out of the HS mode on the next STOP condition For more information on...

Page 26: ...the acknowledge pulse The acknowledgement is achieved by pulling down the SDA line LOW during the 9th clock pulse by the receiving device During reads the Master microcontroller can terminate the current read operation by not providing an acknowledge bit not Acknowledge NAK on the last byte In this case the MCP3422 3 4 devices release the SDA line to allow the Master microcontrol ler to generate a...

Page 27: ...ock low time TLOW 1300 ns SDA and SCL rise time TR 20 0 1Cb 300 ns From VIL to VIH Note 1 SDA and SCL fall time TF 20 0 1Cb 300 ns From VIH to VIL Note 1 START condition hold time THD STA 600 ns After this period the first clock pulse is generated START Repeated condition setup time TSU STA 600 ns Data hold time THD DAT 0 900 ns Note 4 Data input setup time TSU DAT 100 ns STOP condition setup time...

Page 28: ... 3 4 MHz 310 ns Cb 400 pF fSCL 1 7 MHz START condition hold time THD STA 160 ns After this period the first clock pulse is generated START Repeated condition setup time TSU STA 160 ns Data input setup time TSU DAT 10 ns STOP condition setup time TSU STO 160 ns TABLE 5 4 I2 C SERIAL TIMING SPECIFICATIONS CONTINUED Electrical Specifications Unless otherwise specified all limits are specified for TA ...

Page 29: ... 2008 Microchip Technology Inc DS22088B page 29 MCP3422 3 4 FIGURE 5 8 I2 C Bus Timing Data TF SCL SDA TSU STA TSP THD STA TLOW THIGH THD DAT TAA TSU DAT TR TSU STO TBUF 0 7VDD 0 3VDD ...

Page 30: ...MCP3422 3 4 DS22088B page 30 2008 Microchip Technology Inc NOTES ...

Page 31: ...t on the bus There fore it can limit the bus operating speed The lower value of resistor on the other hand consumes higher power but allows higher operating speed If the bus line has higher capacitance due to long bus line or high number of devices connected to the bus a smaller pull up resistor is needed to compensate the long RC time constant The pull up resistor is typically chosen between 5 kΩ...

Page 32: ...or dif ferential and single ended inputs Differential input sig nals can be connected to the CHn and CHn input pins where n the channel number 1 2 3 or 4 For the single ended input the input signal is applied to one of the input pins typically connected to the CHn pin while the other input pin typically CHn pin is grounded All device characteristics hold for the single ended configuration but this...

Page 33: ... measure the voltage across the current sensor and converts it by dividing the measured voltage by a known resistance value The voltage drops across the sensor is waste Therefore the current measurement often prefers to use a current sensor with smaller resistance value which in turn requires high resolution ADC device The device can measure the input voltage as low as 2 µV range or current in µA ...

Page 34: ...as low as approximately 2 µV The internal PGA boosts the input signal level eight times The 40 µV C input from the thermocouple is amplified internally to 320 µV C before the conversion takes place This results in 20 48 LSB C output codes This means there are about 20 LSB output codes or about 4 32 bits per 1 C of change in temperature EQUATION 6 1 5 kΩ VDD 4 5 6 9 CH2 VSS CH3 3 12 CH2 CH3 2 13 CH...

Page 35: ...rmistor The pressure sensor output is 20 mV V This gives 100 mV of full scale output for VDD of 5V sensor excitation volt age Equation 6 3 shows an example of calculating the number of output code for the full scale output of the NPP301 log2 50 mV 15 625μV PGA 11 6 bits for PGA 1 12 6 bits for PGA 2 13 6 bits for PGA 4 14 6 bits for PGA 8 Expected Number of Output Code Where 1 LSB 15 625 µV with 1...

Page 36: ...ature coefficient As shown in Figure 6 7 the thermistor R2 forms a voltage divider with R1 The thermistor sensor is simple to use and widely used for the temperature measurement applications It has both linear and non linear responses over temperature range R1 is used to adjust the linear region of interest for measurement Expected log2 100 mV 15 625μV PGA 12 64 bits for PGA 1 13 64 bits for PGA 2...

Page 37: ... can simply connect any sensing voltage to the input test pads of the board and read conversion codes using the easy to use PICkit Serial Analyzer Refer to www microchip com for further information on this product s capabilities and availability FIGURE 7 1 MCP3424 Evaluation Board FIGURE 7 2 Setup for the MCP3424 Evaluation Board with PICkit Serial Analyzer FIGURE 7 3 Example of PICkit Serial User...

Page 38: ...MCP3422 3 4 DS22088B page 38 2008 Microchip Technology Inc NOTES ...

Page 39: ... designator for Matte Tin Sn This package is Pb free The Pb free JEDEC designator can be found on the outer packaging for this package Note In the event the full Microchip part number cannot be marked on one line it will be carried over to the next line thus limiting the number of available characters for customer specific information 3 e 3 e XXXXXXXX XXXXXNNN YYWW 8 Lead SOIC 300 mil MCP3422 3422...

Page 40: ...150 mil MCP3424 Example XXXXXXXXXXX YYWWNNN XXXXXXXXXXX MCP3424 0816256 XXXXXXXX NNN YYWW 14 Lead TSSOP 4 4 mm MCP3424 Example MCP3424E 256 0816 E SL 3 e 1 2 3 4 5 6 7 8 9 10 10 Lead DFN 3x3 MCP3423 10 Lead MSOP MCP3423 Example XXXXXX YWWNNN 3423E 835256 Example XXXX XYWW NNN 1 2 3 4 5 6 7 8 9 10 3423 0835 256 ...

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Page 51: ...ng is the list of modifications 1 Added MCP3422 and MCP3423 devices throughout this data sheet 2 Added new package marking information and package outline drawings for MCP3422 and MCP3423 devices 3 Added MCP3422 and MCP3423 devices to Product Identification System page Revision A June 2008 Original Release of this Document ...

Page 52: ...MCP3422 3 4 DS22088B page 52 2008 Microchip Technology Inc NOTES ...

Page 53: ...kage b MCP3422A0T E MC Tape and Reel 2 Channel ADC A0 Address Option 8LD DFN package c MCP3422A0 E MS 2 Channel ADC A0 Address Option 8LD MSOP package d MCP3422A0T E MS Tape and Reel 2 Channel ADC A0 Address Option 8LD MSOP package e MCP3422A0 E SN 2 Channel ADC A0 Address Option 8LD SOIC package f MCP3422A0T E SN Tape and Reel 2 Channel ADC A0 Address Option 8LD SOIC package MCP3423 a MCP3423 E M...

Page 54: ...MCP3422 3 4 DS22088B page 54 2008 Microchip Technology Inc NOTES ...

Page 55: ...echnology Incorporated in the U S A All other trademarks mentioned herein are property of their respective companies 2008 Microchip Technology Incorporated Printed in the U S A All Rights Reserved Printed on recycled paper Note the following details of the code protection feature on Microchip devices Microchip products meet the specification contained in their particular Microchip Data Sheet Micro...

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