1
dc1839af
DEMO MANUAL DC1839A
DESCRIPTION
LTC3634
15V Dual 3A Monolithic
Step-Down Regulator Board
for DDR Power
Demonstration circuit 1839A is a dual output regulator
focused specifically for DDR memory power applications.
It’s built based on the LTC3634, a high voltage dual channel,
controlled on-time monolithic synchronous buck regulator.
The DC1839A has an input voltage range of 3.6V to 15V. The
output voltage of the first channel, V
DDQ
, of the DC1839A
has three fixed voltage settings; 1.5V, 1.8V, and 2.5V, and
is capable of delivering up to 3A of output current. The
second channel, V
TT
, is set to regulate to half the voltage
on the VDDQIN pin, which can be either the channel 1
output or an external reference voltage. It can source or
sink a maximum of 3A. The LTC3634 also provides a 10mA
buffered output of half VDDQIN – VTTR, which is used to
provide the reference voltage needed for DDR applications.
With the use of a timing resistor, the DC1839A can have its
operating frequency programmed from 500kHz to 4MHz,
or the DC1839A can be easily synchronized to an external
clock, due to an internal phase-locked loop. The DC1839A
V
DDQ
output can operate in either Burst Mode
®
operation or
L
, LT, LTC, LTM, μModule, Linear Technology, the Linear logo and Burst Mode are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
PERFORMANCE SUMMARY
forced continuous mode. In Burst Mode operation, which
is the preferred mode of low load current operation, the DC
supply current is typically only 1.3mA (both channels) at
no load (sleep mode), and less than 15μA in shutdown. In
Burst Mode operation or continuous mode operation, the
DC1839A is a very efficient circuit at high load currents:
over 80% for either channel. The LTC3634 is also capable
of in-phase or 180° out-of-phase operation, and to allow
its output to track an external voltage, either coincidentally
or ratiometrically. The LTC3634 comes in a 28-pin QFN or
leaded package, which each having an exposed pad on
the bottom side of the IC for better thermal performance.
All of these features make the DC1839A an ideal circuit
for powering DDR memory applications.
Design files for this circuit board are available at
http://www.linear.com/demo
(T
A
= 25°C)
PARAMETER
CONDITIONS
VALUE
Minimum Input Voltage
3.6V
Maximum Input Voltage
15V
Output Voltage V
OUT1
– V
DDQ
V
IN
= 3.6V to 15V, I
OUT1
= 0A to 3A
1.5V ±2% (1.47V to 1.53V)
1.8V ±2% (1.764V to 1.836V)
2.5V ±2% (2.45V to 2.55V)
Typical Output Ripple V
DDQ
V
IN
= 12V, I
OUT1
= 3A (20MHz BW)
< 20mV
P-P
Output Voltage V
OUT2
– V
TT
V
IN
= 3.6V to 15V, I
OUT2
= 0A to ±3A
V
OUT1
= 1.5V
0.75V ±3% (0.7275V to 0.7725V)
V
OUT1
= 1.8V
0.9V ±3% (0.873V to 0.927V)
V
OUT1
= 2.5V
1.25V ±3% (1.2125V to 1.2875V)
Typical Output Ripple V
TT
V
IN
= 12V, I
OUT2
= ±3A (20MHz BW)
< 20mV
P-P
Nominal Switching Frequencies
RT = 324k
1MHz
Burst Mode-to-CCM transition
Channel 1: V
IN
= 12V, V
OUT1
= 1.8V, f
SW
= 1 MHz
I
OUT1
= 1.6A
INTV
CC
3.3V
VTTR
VDDQIN = 2.5V
1.25V
