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DisplayPort VIP Input Board 

 

Evaluation Board User Guide 

FPGA-EB-02014-1.0 

March 2018 

Содержание DisplayPort VIP Input Board

Страница 1: ...DisplayPort VIP Input Board Evaluation Board User Guide FPGA EB 02014 1 0 March 2018 ...

Страница 2: ...3 LVDS Translator 6 2 4 Clock Interface 6 3 High Speed Headers 7 4 Power Supply 9 5 User LEDs and Headers 10 6 Ordering Information 11 References 12 Technical Support Assistance 12 Appendix A DisplayPort VIP Input Board Schematics 13 Appendix B DisplayPort VIP Input Board Bill of Materials 17 RevisionHistory 20 Figures Figure 1 1 Top View of DisplayPort VIP Input Board 4 Figure 1 2 Bottom View of ...

Страница 3: ...ks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA EB 02014 1 0 3 Acronyms in This Document A list of acronyms used in this document Acronym Definition DP DisplayPort I2C Inter Integrated Circuit LDO Low Dropout LED Light emitting Diode LVDS Low Voltage Differential Signaling mDP Mini DisplayPort SPI Serial Pe...

Страница 4: ...esigned to work with the Lattice Video Interface Platform VIP board interconnect system This user guide includes descriptions of board components schematics and bill of materials Key features of the DisplayPort VIP Input Board include Integrated Texas Instruments SN75DP130 DisplayPort 1 1 Redriver Mini DisplayPort mDP connector Two 60 pin Rugged High Speed Headers Figure 1 1 shows the top view of ...

Страница 5: ...ut notice FPGA EB 02014 1 0 5 Upstream Connector J1 Upstream Connector J2 Figure 1 2 Bottom View of DisplayPort VIP Input Board 1 1 Further Information The following references provide detailed information on the DisplayPort VIP Input Board Appendix A DisplayPort VIP Input Board Schematics Appendix B DisplayPort VIP Input Board Bill of Materials For more information on boards and kits available fo...

Страница 6: ...et signal RESET Pressing SW1 provides logic 0 to the SN75DP130 RSTN pin RESET is connected to GSRN on connecter J1 allowing SW1 to control the reset signal for other connected boards 2 2 DisplayPort Interface The mini DisplayPort connector CN1 connects the DisplayPort VIP Input Board to a DisplayPort sink If PWR Out is required on Pin 20 the user must populate the 3 3 V Low Dropout LDO regulator U...

Страница 7: ...e Clock from Si5342 11 GND 13 AUX_P AUX_SRCp DisplayPort Auxiliary Data Channel 14 GND 15 AUX_N AUX_SRCn DisplayPort Auxiliary Data Channel 17 GND 20 GND 22 2 5V 23 GND 24 2 5V 25 GND 26 GND 28 RESET RSTN Global System Reset 30 HPD_SINK HPD_SINK Hot Plug Detect 32 CAD_SINK CAD_SINK DP Cable Adapter Detect 34 GND 36 RXP0_D1CH0 OUT2p DisplayPort Main Link Lane 0 38 RXN0_D1CH0 OUT2n DisplayPort Main ...

Страница 8: ...0 LED2 User LED 11 AUX_IN Aux Channel single ended In 12 LED3 User LED 13 EN EN SN75DP130 Enable 14 LED4 User LED 17 GND 18 GND 19 GND 20 GND 21 SPI_CSN Si5342 I2C SPI Interface 22 GND 23 SPI_CLK Si5342 I2C SPI Interface 24 RX_SENSEP 25 SPI_MOSI Si5342 I2C SPI Interface 26 RX_SENSEN 27 SPI_MISO Si5342 I2C SPI Interface 29 INT_N Si5342 Interrupt 30 SDA_DDC SDA_DDC I2C Display Data Channel 31 OE_N S...

Страница 9: ...d information herein are subject to change without notice FPGA EB 02014 1 0 9 4 Power Supply Board power is supplied through connectors J1 and J2 Figure 4 1 shows the power distribution scheme To provide power to the mini DisplayPort connector install a 5 0 V to 3 3 V LDO at U4 and add shunt to jumper J4 5 V from J1 3 3 V from J1 J2 2 5 V from J1 J2 Status LED D7 Status LED D5 Status LED D6 LDO U4...

Страница 10: ...oard through connector J2 Table 5 1 User LEDs Signal LED Connector J2 Pin Color LED1 D1 8 Green LED2 D2 10 Green LED3 D3 12 Green LED4 D4 14 Green Two 8 pin 100 mil headers J3 and J10 are included on the board Header J3 provides five user connections which are routed to the downstream connector J2 Header J10 provides an external interface to the Si5342 U17 not installed but can also be used to pro...

Страница 11: ...l other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice FPGA EB 02014 1 0 11 6 Ordering Information Please visit www latticesemi com boards for the latest ordering information Table 6 1 Reference Part Number Description Ordering Part Number DisplayPort VIP Input Board DP VIP I ...

Страница 12: ...uct names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice 12 FPGA EB 02014 1 0 References For more information refer to Lattice Embedded Vision Development Kit User Guide FPGA UG 02015 ECP5 VIP Processing Board FPGA EB 02001 Technical Support Assistance Submit a technical support case through www lat...

Страница 13: ...5DP130 GPIO I F 5V 3V3 2V5 Downstream Connector 1 2 I2C X4 DP Data DP AUX I F Control GPIO OnBoard LDO pg4 pg4 pg3 4 Mini DP Connector X4 DP Data pg3 pg3 pg5 Clock Synthesizer Date Size Schematic Rev of Sheet Title Lattice Semiconductor Applications Email techsupport Latticesemi com Board Rev Project Friday 11 Nov 16 B 0 1 5 2 Title Index DisplayPort VIP Input Board A Date Size Schematic Rev of Sh...

Страница 14: ...R_EQ 3 SCL_CTL 4 SDA_CTL 5 VCC 6 NC1 7 CAD_SRC 8 HPD_SRC 9 CAD_SINK 10 HPD_SINK 11 VCC 12 OUT3n 13 OUT3p 14 NC2 15 OUT2n 16 OUT2p 17 GND 18 OUT1n 19 OUT1p 20 NC3 21 OUT0n 22 OUT0p 23 GND 24 VCC 25 EN 26 AUX_SINKn 27 AUX_SINKp 28 AUX_SRCn 29 AUX_SRCp 30 GND 31 VCC 32 SCL_DDC 33 SDA_DDC 34 RSTn 35 VCC 36 NC7 37 IN0p 38 IN0n 39 NC6 40 IN1p 41 IN1n 42 NC5 43 IN2p 44 IN2n 45 NC4 46 IN3p 47 IN3n 48 EP 4...

Страница 15: ...Latticesemi com Board Rev Project Friday 11 Nov 16 B 0 1 5 4 Power Debug LED Header I F DisplayPort VIP Input Board A Date Size Schematic Rev of Sheet Title Lattice Semiconductor Applications Email techsupport Latticesemi com Board Rev Project Friday 11 Nov 16 B 0 1 5 4 Power Debug LED Header I F DisplayPort VIP Input Board A D3 Green 1 2 D6 Green 1 2 C39 0 1uF J3 8 HEADER 1 2 3 4 5 6 7 8 R192 0 D...

Страница 16: ... DisplayPort VIP Output Board A Date Size Schematic Rev of Sheet Title Lattice Semiconductor Applications Email techsupport Latticesemi com Board Rev Project Friday 11 Nov 16 B 0 1 5 5 CLOCK SYNTHESIZER DisplayPort VIP Output Board A C120 1uF J5 CON3 1 2 3 1K R484 C42 18pF DNI C41 18pF DNI 1K R471 R467 100E R468 0 R478 330E C115 100nF C122 1uF J8 CON3 1 2 3 C121 1uF J10 8 HEADER 1 2 3 4 5 6 7 8 C4...

Страница 17: ...UF 10V 10 X5R 0402 4 C18 C21 C25 C26 C43 5 0 1 uF GRM155R61A104KA01D Murata CAP CER 0 1UF 10V X5R 0402 5 C20 C28 2 10 uF GRM21BR61A106KE19L Murata CAP CER 10UF 10V 10 X5R 0805 6 C22 C23 C30 C31 C32 C33 C34 C35 C44 C46 C49 C51 12 100 nF GRM155R61A104KA01D Murata CAP CER 0 1UF 10V X5R 0402 7 C36 C38 2 10 uF CL10X106MP8NRNC Samsung CAP CER 10UF 10V 20 X6S0603 8 C37 C39 2 0 1 uF CL05A104MP5NNNC Samsun...

Страница 18: ... 215 NXP USA Inc TRANS NPN 40V 0 6A SOT23 24 Q2 1 D1213A 01WS 7 D1213A 01WS 7 Diodes Incorporated TVS DIODE 3 3VWM 10VC SOD323 25 R1 R2 R3 R4 R29 R30 R44 R475 R476 R479 10 4 7 k CRCW06034K70FKEA Vishay RES SMD 4 7K OHM 1 1 10W 0603 26 R5 R6 R7 R8 R9 R10 R11 R 12 R13 R15 R19 R39 R192 R195 R196 R468 16 0 RC0603JR 070RL Yageo RES SMD 0 0OHM JUMPER 1 10W 0603 27 R14 R16 R21 3 1 M ERJ 2GEJ105X Panasoni...

Страница 19: ...Panasonic RES SMD 100K OHM 0 1 1 16W 0402 39 R467 1 100E TNPW0402100RBEED Vishay RES SMD 100 OHM 0 1 1 16W 0402 40 SW1 1 SYS_RST 434153017835 Wurth SWITCH TACTILE SPST NO 0 05A 12V 41 TH1 TH2 TH3 TH4 4 ThruHole DNL 42 U1 1 SN75DP130SS SN75DP130SSRGZR Texas Instruments IC DISPLYPRT 1 1 REDRIVR 48VQFN 43 U2 1 SN65MLVD200 SN65MLVD200AD Texas Instruments IC LVDS LINE DVR RCVR 8 SOIC 44 U4 1 XC6222B331...

Страница 20: ...nts and disclaimers are as listed at www latticesemi com legal All other brand or product names are trademarks or registered trademarks of their respective holders The specifications and information herein are subject to change without notice 20 FPGA EB 02014 1 0 Revision History Date Version Change Summary March 2018 1 0 Initial release ...

Страница 21: ...7th Floor 111 SW 5th Avenue Portland OR 97204 USA T 503 268 8000 www latticesemi com ...

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