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©2002 Fairchild Semiconductor Corporation

Application Note 7502 Rev. A1

AN-7502

Power MOSFET Switching Waveforms:

A New Insight

The examination of power MOSFET voltage and current
waveforms during switching transitions reveals that the
device characterization now practiced by industry is inade-
quate. In this Note, device waveforms are explained by con-
sidering the interaction of a vertical JFET driven in cascode
from a lateral MOSFET in combination with the interelec-
trode capacitances. Particular attention is given to the
drain-voltage waveform and its dual-slope nature. The
three terminal capacitances now published by the industry
are shown to be valid only for zero drain current. For cases
where the gate drive is a voltage step generator with inter-
nal fixed resistance, the drain voltage characteristics are
inferred from the gate current drive behavior and compared
to observed waveforms. The nature of the “asymmetric
switching times” is explained.

A waveform family is proposed as a more descriptive and
accurate method of characterization. This new format is a
plot of drain voltage and gate voltage versus normalized
time. A family of curves is presented for a constant load
resistance with V

DS

 varied. Gate drive during switching

transitions is a constant current with voltage compliance
limits of 0 and 10 volts. Time is normalized by the value of
gate driving current. The normalization shows excellent
agreement with data over five orders of magnitude, and is
bounded on one extreme by gate propagation effects and
on the other by transition time self-heating (typically tens of
nanoseconds to hundreds of microseconds).

Device Models

The keystone of an understanding of power MOSFET
switching performance is the realization that the active
device is bimodal and must be described using a model that
accounts for the dual nature. Buried in today’s power MOS-
FET devices is the equivalent of a depletion layer JFET that
contributes significantly to switching speed. Figure 1 is a
cross-sectional view of a typical power MOSFET, with MOS-
FET/JFET symbols superimposed on the structure.

Figure 2 is obtained by taking the lateral MOS and vertical
JFET from this conception and adding all the possible node-
to-node capacitances. Computed values of the six capaci-
tances for a typical device structure suggest that device
behavior may be adequately modeled using only three
capacitors in the manner of Figure 3. This is the model to be
employed for analysis and study.

FIGURE 1. CROSS-SECTION VIEW OF MOSFET SHOWING 

EQUIVALENT MOS TRANSISTOR AND JFET

FIGURE 2.

MOS TRANSISTOR WITH CASCODE-CONNECTED 

JFET AND ALL CAPACITORS

FIGURE 3.

FIGURE 2 SIMPLIFIED

Gate Drive: Constant Voltage or 
Constant Current

Before moving on to the study of the equivalent circuit states
of the model, a gate-drive forcing function which is easy to
represent, relates to reality, and best illustrates device
behavior must be chosen. The choice may be immediately
narrowed to two: 

(1) An instantaneous step voltage with internal resistance R,
Figure 5.

(2) An instantaneous step current with infinite internal resis-
tance, Figure 6.

SOURCE METAL

POLY GATE

GLASS GATE OXIDE

0

10 VOLTS

DEPLETION EDGE

40 VOLTS

n+ DRAIN

JFET

n-

MOS

n+ SOURCE

p BODY

p+

GATE

C1

C2

C6

C3

C5

C4

SOURCE

DRAIN

GATE

C

GS

C

DS

SOURCE

DRAIN

C

x

Application Note 

October 1999

 /Title 
AN75

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Summary of Contents for Power MOSFET AN-7502

Page 1: ...nds Device Models The keystone of an understanding of power MOSFET switching performance is the realization that the active device is bimodal and must be described using a model that accounts for the...

Page 2: ...tate 1 MOS Off JFET Off In a power MOSFET device no drain current will flow until the device s gate threshold voltage Vgs TH is reached Dur ing this time the gate s current drive is only charging the...

Page 3: ...t5 VDK VD SAT Cx lG State 4 MOS Saturated JFET Saturated Turn Off In this state in addition to gMJVX being shorted the gMVG cur rent generator is shorted and IG is occupied with charging CX and CGS in...

Page 4: ...switching time versus 1 RO to be of the same form as those obtained for a step current drive This is exactly the case as Figure 10 is merely a vari ation of Figure 8 Using the relationships of Table 1...

Page 5: ...complexity FIGURE 10 CONSTANT GATE VOLTAGE SWITCHING TIME Using the Characterization Curve Figure 9 To estimate the switching times for an RFM15N15 power MOSFET under the conditions VG 10V VDD 75V RO...

Page 6: ...and the 90 level by another Device comparisons based on the classical switching definition can be very misleading Appendix A Analysis for Resistive Step Voltage Inputs Step Voltage Gate Drive To obtai...

Page 7: ...time The equivalent circuit then predicts State 4 Mos Saturated JFET Saturated Turn off Both equivalent circuit generators are short circuits and the gate drive is discharging CX in parallel with CGS...

Page 8: ...on Source Gate Drive Figure B 3 FIGURE B 3 COMMON SOURCE GATE DRIVE CIRCUIT Turn On RO RD drain to ground capacitance of driving device adds to CGS of driven MOSFET Turn Off RO rDS ON of driving MOSFE...

Page 9: ...ife support device or system or to affect its safety or effectiveness PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Preliminary...

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