dg_toeudp10gip_fpgasetup_intel.doc
26-Aug-20
Page 1
FPGA setup TOE/UDP10G-IP with CPU Demo
Rev3.0
26-Aug-20
This document describes how to setup FPGA board and prepare the test environment for running
TOE10G-IP or UDP10G-IP demo. The user can setup two test environments for transferring TCP
data or UDP data via 10Gb Ethernet connection by using TOE10G-IP or UDP10G-IP, as shown in
Figure 1-1.
Figure 1-1 Two test environments for running the demo
First uses one FPGA board and Test PC with 10Gb Ethernet card for transferring the data. TestPC
runs test application, i.e. tcpdatatest (half-duplex test for TOE10G-IP), tcp_client_txrx_40G
(full-duplex test for TOE10G-IP) or udpdatatest (test application for UDP10G-IP). Also, NiosII
terminal is run on Test PC to be user interface console.
Second uses two FPGA boards which may be different board. Both boards run TOE10G-IP or
UDP10G-IP demo with assigning the different initialization mode (Client or Server) for transferring
data.
