Anaya Tech Systems ezTrainer User Manual Download | Manualshive

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ezTrainer

User Manual

FPGA MADE eAzY

All Rights Reserved

Anaya Tech Systems Pvt Ltd

ezTrainer FPGA Kit

User Manual Rev 1.0

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Summary of Contents for ezTrainer

Page 1: ...ezTrainer User Manual FPGA MADE eAzY All Rights Reserved Anaya Tech Systems Pvt Ltd ezTrainer FPGA Kit User Manual Rev 1 0 ...

Page 2: ... the required paraphernalia to help you kick start your FPGA designs Here s a snap shot of the board explaining the interfaces that you see Along with the board you should have received A 5V DC adapter to power the board the board can also be USB powered UART cable Ethernet cable USB cable A CD that contains our SW and the reference documents along with some demo application codes VGA out UART MIC...

Page 3: ...he FPGA without the need for a separate expensive JTAG cable Demo applications help you have a hands on to develop your own programs The board is also available with a higher density option of XC3S500E contact sales for details 1 2 MAIN COMPONENTS The board has the following main components FPGA Xilinx Spartan 3E XC3S250E 208 pin PQFP package SPI Flash 8 Mbit ST Microelectronics M25P80 VMW6 SDRAM ...

Page 4: ...ble connected a serial terminal shows up once the FPGA is loaded by the default program present in the SPI flash See the UART section for more details Optionally the board can be powered up through USB Change the jumper position JP200 located to the left of the power switch to 2 3 to power up from USB However it is advisable that you power the board from the DC wall adapter Green color LED200 indi...

Page 5: ...ms Pvt Ltd 3 0 CLOCKS The board has a 50 MHz clock oscillator fed to the pin 83 Global Clock 3 of the FPGA This can act as a primary input for all your programs A secondary clock can also be fed from the general purpose header pin 95 to the pin 80 Global Clock 0 of the FPGA ...

Page 6: ...ng a bit image file You can program the FPGA through our ezConnect software Check for the following jumper settings before proceeding Jumpers shown in the figure JP400 401 402 403 should all be connected with pin 2 shorted to pin 3 default option given when the boards are shipped Connect the USB cable and power on the board The JTAG configuration window of the software ezConnect is shown below The...

Page 7: ...comes loaded with a default program in the SPI flash that can load the FPGA to run some test pro grams However ezConnect allows you to modify this flash and store your own programs Note that the settings for this should be the shorting of pins 1 2 on jumpers JP400 401 402 403 Also you need to remove the default jumpers present on J400 that short pins 1 2 and 3 4 See in the figure below Once jumper...

Page 8: ...ammed you can remove jumpers from JP400 401 402 403 Put the jumpers back on J400 Power up the board and FPGA should now come up with your new image 4 3 DONE PIN LED Once the FPGA is programmed a successful programming is indicated by the DONE pin going high This is indicated by LED400 on the board getting ON All LEDs are located on the right of the board See below ...

Page 9: ...you can develop your own codes Datasheet of this device is available on www ftdichip com Table below describes the FPGA pin connections made to this device to enhance your own development needs 5 2 SPI FLASH INTERFACE A serial SPI flash of 8 Mbit is connected to the FPGA pins as shown in the table below Datasheet of the flash can be obtained from www st com Table 1 Signal Names as in FT2232 FPGA P...

Page 10: ...ow See datasheet of the SDRAM at www issi com SPI_CS 55 1 SPI_DI 87 2 Table 3 Signal Names FPGA Pin SDRAM pin D0 25 2 D1 24 4 D2 23 5 D3 22 7 D4 19 8 D5 18 10 D6 16 11 D7 15 13 D8 12 42 D9 11 44 D10 9 45 D11 8 47 D12 5 48 D13 4 50 D14 3 51 D15 2 53 A0 69 23 A1 68 24 A2 65 25 A3 64 26 A4 63 29 A5 62 30 A6 50 31 A7 49 32 A8 48 33 A9 47 34 A10 45 22 Table 2 Signal Names FPGA Pin M25P80 pin ...

Page 11: ...the FPGA to provide an audio interface 13 bit Linear as well as 9 bit u law digital audio data is sent over the PCM interface to the audio codec which is then played over the speaker Audio can also be captured over the MIC and sent back to FPGA over PCM Speaker Mute and code selection can be done through the jumpers JP301 300 see below A11 42 35 A12 41 36 BA0 40 20 BA1 39 21 CS 34 19 CAS 36 17 RAS...

Page 12: ...e MIC interface is universal Please take care to bring audio codec out of reset before any communication can happen 5 6 ETHERNET INTERFACE A 10 100Base TX Ethernet Transceiver device KSZ8041TL from Micrel www micrel com is connected to the FPGA The FPGA can have a simple Media Access Control MAC interface that talks to the transceiver over Table 5 Signal Names FPGA Pin CODEC pin RESET 106 13 PCM_R...

Page 13: ...n below The LCD has to be used in a 4 bit data format only signals needed are RS ENABLE DB4 DB7 DB0 DB3 are not used 5 8 VGA INTERFACE A VGA monitor can be used to implement display projects using the FPGA The interface from the FPGA to the 15 pin VGA connector is as shown below Table 6 Signal Names FPGA Pin Transceiver pin MDC 205 19 MDIO 206 18 TXEN 203 34 TXD0 202 35 TXD1 200 36 RXDV 204 27 RXD...

Page 14: ...interface can be used to take commands from a PC and control a Robot module connected to the GPIO connector The table below gives the pin assignments of the conector VERTICAL SYNC 172 14 HORIZONTAL SYNC 177 13 Table 9 Signal Names FPGA Pin GPIO Connector pin GPIO0 153 2 GPIO1 152 5 GPIO2 151 8 GPIO3 150 11 GPIO4 147 14 GPIO5 146 17 GPIO6 145 20 GPIO7 144 23 GPIO8 140 26 GPIO9 139 29 GPIO10 138 32 ...

Page 15: ... note that the entire row of pins on the board edge are 3 3V and the entire inner row is 0V A maximum of 1 Amp of current can be drawn from this voltage to power your own boards See also figure below 5 10 LED INTERFACE The FPGA pins drive eight general purpose green LEDs as shown in the table below Drive the FPGA pin high to lit the LED GPIO25 115 77 GPIO26 113 80 GPIO27 112 83 GPIO28 109 86 GPIO2...

Page 16: ...ezTrainer FGPAs made EAZY User Manual All Rights Reserved Anaya Tech Systems Pvt Ltd Table 10 Signal Names FPGA Pin LED1 186 LED2 187 LED3 189 LED4 190 LED5 192 LED6 193 LED7 196 LED8 197 ...

Page 17: ... projects These demo codes are also easily integrated with our USB interface controller this comes to you in a synthesized form so that you can merge this with your source code to generate the final bit map 6 1 SPI FLASH CONTROLLER 6 2 SDRAM CONTROLLER 6 3 AUDIO PLAYER CONTROLLER 6 4 UART CONTROLLER 6 5 LCD CONTROLLER 6 6 VGA CONTROLLER 6 7 BASIC EMBEDDED SYSTEM MODULE 6 8 TRAFFIC LIGHT CONTROLLER...

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